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2013 IEEE International Integrated Reliability Workshop (IIRW)

IEEE sponsors:

  • IEEE Electron Devices Society
  • IEEE Reliability Society

We invite you to submit a presentation proposal that addresses any semiconductor related reliability issue, including the following topics: resistive memories, high-k and nitrided SiO2 gate dielectrics, reliability assessment of novel devices, III-V, SOI, emerging memory technologies, transistor reliability including hot carriers and NBTI/PBTI, root cause defects (physical mechanisms and simulations), Cu interconnects and low-k dielectrics, impact of transistor degradation on circuit reliability, designing-in reliability (products, circuits, systems, processes), customer product reliability requirements / manufacturer reliability tasks, wafer level reliability tests (test approaches and reliability test structures), reliability modeling and simulation, optoelectronics, and single event upsets.

 

Conference Details

Dates

13 Oct - 17 Oct 2013

 

Location

Stanford Sierra Conference Center
130 Fallen Leaf Road
El Dorado National Forest
South Lake Tahoe, CA, USA

 

Web site

 

Contact

JasonCampbell
National Institute of Standards and Technology
100 Bureau Drive, MS 8120
Gaithersburg MD USA 20899
301-975-8308
jason.campbell@nist.gov

 

Conference #

31681

 

Attendance

75

 

 

Please see the conference Web site for full details.

Call for Papers for Conference Authors

Find details for paper and abstract submission.

Abstract submission deadline: 12 Jul 2013

Final submission deadline: 10 Oct 2013

Notification of acceptance date: 09 Aug 2013

 

 

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