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The 2001 IEEE Non-Volatile Semiconductor Memory Workshop (NVSMW) will be held August 12–15, 2001, in Monterey, CA. The workshop is sponsored by the IEEE Electron Devices Society. NVSMW is a unique forum for both specialists in all aspects of nonvolatile memory microelectronics and novices wanting to gain a broader understanding of the field. Attendees represent professional and academic researchers involved with semiconductor non-volatile memory development and production along with end users of memory products. Principal topics for discussion at NVSMW are device physics; silicon processing; product testing; new technologies, including multi-level-cell approaches; programmable logic; memory cell design; integrated circuits; solid state disks and memory cards; memory reliability; and new applications.
An important goal of NVSMW is to provide an informal environment to encourage discussions among participants and lively interactions. There will be morning and afternoon technical sessions, along with a lively evening panel discussion on a hot topic in the nonvolatile memory field. Technical interaction among presenters and attendees is encouraged through question and answer sessions and allotting ample time after the formal paper presentations for further in-depth discussions. Organized breaks, including snacks and the workshop dinner and lunch, are provided as opportunities to meet and exchange ideas with colleagues. Breakfasts are also provided. The morning and afternoon technical sessions are organized in a manner to provide ample time for the informal exchange and to enjoy the beauty of the Monterey peninsula region of California.
This year will be the 18th meeting of NVSMW. The workshop is held every 18 months, alternating between February and August. The February meeting is usually held the week after ISSCC and the August meeting in the early weeks of the month. For many years, the attendance for the workshop was around 100. Early workshops alternated between Monterey, CA, for the February meeting and Vail, CO, for the August meeting. The Vail venue was dropped a number of years ago, to facilitate attendance and travel from the nearby Silicon Valley. In recent years, the attendance has grown considerably, reflecting the large growth in the memory market, particularly flash memory and embedded memory on logic cores, with the last workshop attendance being in excess of 250. In order to maintain the workshop atmosphere of the forum, the maximum attendance is limited to 300. Therefore, advance registration is highly recommended. NVSMW is attended by a wide international community from North America, Europe, Japan and other Asian countries. The past several workshops have had featured sessions to address the growth of segments of the memory market.
The last workshop, in 2000, featured two invited papers in addition to the keynote speech presented by Alan Niebel of Web-Feet Research, Inc. He presented the Flash memory five-year forecast, which established the 1999 Flash sales of $4.5 billion and projected 2000 to be around $11 billion. In addition, Web-Feet Research provided forecasts for the other NV memories, Flash card forecasts, embedded Flash forecasts as well as application specific Flash forecasts for cell phones, digital cameras, and MP3 Players among the fifty different applications he covers in his market research. One of the invited papers was on Foundry Operation with Flash Technology presented by Di-Son Kuo of TSMC. He reviewed Flash technology development at their foundry fab, discussed the complexity of running logic process and embedded Flash process in same fab, and managing production logistic issues. The other invited paper was on NAND Flash memory, presented by Riichiro Shirota of Toshiba Corporation, who reviewed the NAND cell operation, reliability, processing and design considerations. We had two panel discussions in the last workshop, in 2000. One was on Monday afternoon titled, "End User Forum" moderated by John Caywood to explore possible applications and desired product features. The Wednesday evening panel discussion focused on Test & Testability and provided different perspectives from both test equipment suppliers and memory product designers, and was moderated by Alan Niebel.
For this year's workshop, the deadline for submitting abstracts to the Technical Chairman was February 23, 2001. Electronic submission of the abstract using either Microsoft Word or Adobe Acrobat was highly encouraged. Proceedings consisting of bound copies of all abstracts will be handed out to attendees at the conference, along with a list of attendees and their phone numbers and e-mail addresses to allow future contact of workshop colleagues. It is anticipated that the format of the 2001 workshop will closely mimic that of this past year's, with 30 technical paper presentations expected. The last workshop consisted of six technical sessions over a three day period. The workshop opened with a Sunday evening registration reception, consisting of drinks and hors d'oeuvres. The technical sessions consisted of an invited paper, sessions on: design issues, integration issues, new devices, reliability issues, and cell characterization & device modeling. Breakfast opened each day, while a workshop reception dinner and evening panel discussion closed out Tuesday evening. The workshop formally closed on Wednesday afternoon. Breakfast was also provided on Thursday morning, for those remaining in the Monterey area.
The 2001 NVSMW will be held at the Hyatt Regency in Monterey, CA. The hotel is conveniently situated in the Monterey peninsula and allows fast access to many sights. Among favorite destinations are the famous Fisherman's Wharf, Cannery Row, The Monterey Bay Aquarium, 17-Mile Drive, nearby Carmel, and the many tranquil sights of natural beauty of the Monterey coastline and the fine dining experiences of the area. The Hyatt Regency is located at One Old Golf Course Road, Monterey, CA. The hotel can be reached by TEL: 408-372-1234.
For registration information and general inquiries about NVSMW, please contact any of the workshop chairmen.
General Chairman: Arthur Wang, Hyundai Electronics America, 3103 North First Street, San Jose, CA 95134 USA, TEL: 408-232-8811, FAX: 408-232-8805, E-Mail: awang@hea.com;
Technical Chairman: Krishna Parat, M/S RN3-01, Intel, 2200 Mission College Blvd. Santa Clara, CA 95054, USA, TEL: 408-765-9381, FAX: 408-765-5775, E-Mail: Krishna.Parat@intel.com ;
Finance Chairman: Kelly Baker, Motorola, Inc., Mail Drop OE341, 6501 William Cannon Dr. West, Austin, TX 78735,
TEL: 512-895-8335, FAX: 512-895-2722, E-Mail: kelly.baker@motorola.com.
You can also visit the NVSMW web site at http://www.hea.com/hean2/flash/nvsmw/index.html .
Arthur Wang
Hyundai Electronics America
San Jose, CA