2004 IEEE International Symposium on Plasma-
and Process-Induced Damage (P2ID)
The ninth annual International
Symposium on Plasma- and Process-Induced Damage will be held May
17-19 in Austin, Texas. This conference, popularly known as P2ID,
has served for nearly a decade to highlight issues surrounding
all aspects of process-induced damage in semiconductor fabrication.
Since its inception in 1996, this conference has been held in
California, Hawaii, and Paris, making it truly international.
This will be the first time the conference will be held in Texas,
and the venue will be Motorola University. Participants have historically
been drawn from the full spectrum of academia, research, development,
and manufacturing, and from all over the world.
Process-induced damage may be properly regarded as the unintended
(and presumably undesirable) consequence of a fabrication step.
This may be because the process was poorly designed at the outset
and invariably induces damage, or it may be because the control
of the process variables is inadequate, and occasionally damage
is induced, or it may be because a specific structure on the wafer
is uniquely sensitive. Although the distinction may become blurry
in the details, damage is often categorized as either "physical"
or "electrical." One example of physical damage is a
notch etched at the bottom of a polysilicon gate. Another would
be the implant-induced damage at the edge of the gate. The most
common example of electrical damage is the degradation of the
gate insulator due to a charge buildup during a subsequent fabrication
process such as a contact etch step. Phenomena such as the above
examples have been extensively discussed at previous P2ID conferences
from a broad perspective. Fundamental to the effort is to understand
the mechanism by which the damage occurs, but there are myriad
approaches to the appropriate solution. Proper process conditions
may address the problem, but careful design of the tool itself
may be more relevant. Design rules may also be incorporated to
limit the damage on real circuits, and the robustness of the semiconductor
materials may also alleviate the consequences. All of these aspects
of damage - mechanisms, processes, tooling, design rules, materials
- are the province of this conference and it is why the study
of these phenomena is multi-disciplinary.
There are several trends in the industry that signal an evolution
of this field of study. For example, the nature of the gate dielectric
is evolving - will the emergence of high-k gate insulators reduce
or increase the susceptibility to process-induced damage? Of the
various candidates are there some that are more resistant to damage?
The continuing requirement for legacy power supply compatibility
requires that new technologies also have thicker gate dielectrics
available - the compatibility of advanced processes with these
"older" dielectrics is an interesting question. One
trend in advanced technology that has become more important is
that some process controls are no longer practical to keep the
same tight specification as in older technology. Such limitation
can either come from the extraordinary level of difficulties involved
or from fundamental physics. Either way, the reduced control inevitably
impact circuit performance, yield and reliability. These issues
are the very core of process induced "damage" and P2ID
is the perfect forum for it.