UPCOMING TECHNICAL MEETINGS


1998 International Electron Devices Meeting (IEDM)

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Photo Credit: San Francisco Convention & Visitors Bureau

The premier technical conference of the Electron Devices Society will return to San Francisco this year when the 44th annual International Electron Devices Meeting (IEDM) comes to the San Francisco Hilton and Towers during December 6-9, 1998.

The IEDM is the world's leading international forum for reporting advances in the technology, design, manufacturing, physics and modeling of electron devices ranging from deep submicron MOSFET's to flat-panel displays, from compound semiconductor materials to new memory architectures, and from novel microelectromechanical (MEMs) devices to smart-power technologies.

The conference attracts authors, attendees and guest speakers from industry and academia from around the world and provides an excellent opportunity to meet colleagues and keep up with the state-of-the-art in a broad range of interrelated disciplines. The conference hotel is conveniently located near many of San Francisco's finest restaurants, shopping and tourist destinations, making for an enjoyable stay in one of the world's greatest cities.

IEDM '98 Technical Program

The heart of the IEDM is the technical program. No other meeting presents as much leading work in so many different areas of microelectronics. The IEDM offers students, scientists and engineers an opportunity to hear about the best work being done in their own disciplines and related areas and offers them the opportunity to speak directly with experts working in these areas.

IEDM'98 will feature an increased emphasis and a greater number of papers in the areas of device manufacturing, RF devices and silicon based displays and sensors. Device manufacturing techniques to ensure high yield, tight parametric control, and high reliability are becoming even more critical in the era of $1 billion fabs. RF (radio frequency) devices are essential elements in many advanced communication systems. Silicon based displays and sensors are also playing an increasingly important role in the electronic marketplace. The technical conference will also feature a number of papers from universities. Limited financial assistance is available for students who are presenting papers. Each year an award is presented for the best student paper.

IEDM'98 will feature more than 200 invited and contributed papers by authors from throughout the world dealing with the latest advances in several areas, including: CMOS Devices and Reliability: Topics include device physics, performance and reliability of MOS structures, scaling, SOI and device isolation. Detectors, Sensors and Displays: Reports on advances in theory, performance, modeling and fabrication processing of detectors, sensor devices, actuators and displays. Device and Interconnect Technology: Features advances in process integration, interconnect technology and process modules for the fabrication of CMOS, bipolar and BiCMOS devices. Integrated Circuits: Covers advances in device integration, circuit applications and related technologies. Topics include the process architecture for manufacturability, reliability, performance and testing. Modeling and Simulation: Topics include analytical, numerical and statistical approaches to modeling of all types of electron devices, their isolation and interconnection. Quantum Electronics and Compound Semiconductor Devices: The areas of compound semiconductor electronic and photonic devices and materials. Solid State Devices: Reports on the theory and operation of smart-power ICs, bipolar, discreet power, high voltage, DMOS, IGBT, superconducting, novel devices, silicon based quantum devices, SiGe and SiC devices and IC's, integrated passive components and RF devices.

Short Courses

A popular feature of the IEDM is the program of short courses held the Sunday before the conference formally begins. This year, the courses will be offered on Sunday, December 6. They provide attendees with the opportunity to learn about new and emerging areas and to benefit from direct contact with the lecturers who are experts in the field. Introductory material for general audiences is also included.

This year, the two Short Course subjects will be "Reliability for Logic and Memory Technologies" and "Next Generation TCAD: Models and Methods". The courses are held at the same location as the conference. Since they take place on Sunday, they offer the opportunity to take advantage of discounted airfares, which include a Saturday night stay over. The registration fee for each Short Course is $350 (for both IEEE members and non members) and $50 for students. Advance registration is required.

Our luncheon speaker this year will be Dr. Yoshio Nishi, Senior Vice President and Director, Research and Development of the Semiconductor Group of Texas Instruments. He will speak on "Technology Development Trends in the Next Millennium". Dr. Nishi joined Texas Instruments in 1995 and is currently a visiting professor at Waseda University in Japan and a consulting professor at Stanford University. Dr. Nisihi is a Fellow of IEEE and a member of the Japan Society of Applied Physics, Institute of Electronics, Information and Communications Engineers of Japan and the Electrochemical Society.

Plenary Presentations

In addition to the regular paper sessions, the conference will include three plenary presentations dealing with developing technologies. This year's talks will be:

"Semiconductor Process Equipment" by Paul Peercy from Sematech, "System on a Chip" by Daeje Chin, from Samsung Electronics, Korea, and "Electronics for Communication" presented by Professor Matti Otala from Helsinki, Finland.

Panel Sessions

IEDM'98 will continue the tradition of holding evening panel sessions on important topics of interest to the electronics community. This year the topics will be: "Do Copper and Low-k Solve All of Our Interconnect Related Problems?" moderated by Shyam Murarka from RPI and "Front End Processing: Scaling Challenges for Nanometer Transistors" led by Steven Hillenius from Lucent Technologies.

Special Manufacturing Session

IEDM'98 will feature for the first time a special session on device manufacturing issues. This session will be assembled from papers submitted to the IEDM in all areas of interest to the conference and will feature presentations describing issues related to device manufacture and control. The appearance of this session reflects the importance of these topics to the industry at large.

Late News Papers

The submission date for regular papers has already passed but a limited number of late-news papers will be accepted for presentation. If you have recent outstanding developments you wish to publish at the conference, please submit by September 16, one original of your proposed paper (including artwork) and 25 copies to Phyllis Mahoney, IEDM, 101 Lakeforest Boulevard, Suite 270, Gaithersburg, MD 20877, USA. Accepted late-news papers and accompanying figures will be printed as received in the Technical Digest. Submission of a late-news paper for review will be considered by the review committee as consent from the author for its publication, if accepted.

Further Information

For registration and other information, visit the IEDM 1998 Home Page on the World Wide Web at http://www. ieee.org/conference/iedm or contact Conference Managers Melissa Widerkehr and Phyllis Mahoney, Suite 270, 101 Lakeforest Boulevard, Gaithersburg, MD 20877, USA; TEL: (301) 527-0900; FAX (301) 527-0994.

Howard Masto
Masto Public Relations
Latham, NY


 1998 Semiconductor Interface Specialists Conference (SISC)

sisc.jpg (185574 bytes)The 1998 IEEE Semiconductor Interface Specialists Conference (SISC) will be held December 3-5, 1998 in San Diego, CA, immediately prior to the International Electron Devices Meeting (IEDM). The SISC provides a unique forum for device engineers, solid-state physicists, and materials scientists to discuss issues of common interest. Principal topics for discussion at SISC are semiconductor interfaces, the physics of insulating thin films, and the interaction among materials, science, device physics, and state-of-the-art technology. The conference emphasis is on silicon-based devices, including the SiGe and SiC systems.

An important goal of the conference is to provide an environment that encourages an interplay between scientific and technological issues. Invited and contributed talks, as well as a lively poster session, are presented in a setting designed to encourage discussion, and conference participants enjoy numerous opportunities for informal gatherings.

This year will be the twenty-ninth meeting of SISC. The "Interface Specialists Conference" was first held in 1965 and attendance was by invitation. The hot topic of the day was sodium contamination in SiO2. Starting with the fourth meeting held in 1973, the conference has been held annually. By then, the word "Semiconductor" had been added to the conference name. The SISC now alternates between the east and west coasts, and meets just before the IEDM. Abstracts for contributed talks are typically due in early August.

While SISC has remained focused on silicon-based technology and the Si-SiO2 system, topics have evolved, as the state-of-the-art has advanced. Invited talks at this year's conference focus on many of the topics that will be discussed at the SISC; a preliminary list of invited presentations follows:- Yoav Nissan-Cohen (co-CEO, Tower Semiconductor Corporation, Israel) has tentatively agreed, schedule permitting, to discuss issues associated with Embedded Flash Memories. Yasu Nishioka (Texas Instruments, Japan) will describe Characterization and Control of Ultrathin Oxide Interfaces. A complementary presentation by K. R. (Beau) Farmer (New Jersey Institute of Technology, USA) will treat the issue of Electrical Characterization of Ultrathin Oxides. Melissa Hines (Cornell University, USA) will focus on SiO2 surface chemistry in her presentation on Understanding the Evolution of Silicon Surface Morphology During Aqueous Etching. The emerging commercial interest in silicon-on-insulator technology is reflected in the talk by Ronald Bolam (IBM, USA) on SOI Gate Oxide Reliability. An update on issues associated with using electronics in high radiation environments will be given by Paul Dressendorfer (Sandia National Laboratories, USA), whose talk is entitled "Basic Mechanisms of Radiation Damage in Semiconductor Devices - Revisited with an Eye Toward the Future". For those interested in dielectrics other than SiO2, Brad Melnick (Motorola, USA) will discuss Effects of the Electrode Interface on the Dielectric Performance of Barium Strontium Titanate Capacitors for High Density DRAM Applications. And, for those interested in technology developments in the SiC world, Carl-Mikael Zetterling (KTH - Royal Institute of Technology, Sweden) will review Dielectric Issues for Silicon Carbide MOS Devices.

The formality of the invited and contributed talks is complemented by several informal settings designed to encourage lively discussion and debate. At the poster reception on Thursday evening, a spread of finger-foods, wine, and cheese will encourage interaction among poster authors and other conference participants. There are no scheduled talks on Friday afternoon to allow time to meet informally, relax on the beach, or visit one of San Diego's numerous attractions. On Friday evening, the conference hosts a banquet and awards ceremony, complete with the now-famous (and always riotous) limerick contest. You are sure to be approached for a limerick contribution, so unleash your literary zeal and enjoy the fun! The limericks never fail to give the conference events an entirely new perspective!

This year's SISC will continue the tradition of presenting an award memorializing Prof. E. H. Nicollian. The award will be given for the best student presentation. Ed Nicollian was a pioneer in the exploration of metal oxide semiconductor (MOS) systems. His contributions were important to establishing SISC in its early years, and he served as the Technical Chair in 1982. With John Brews, he wrote the definitive book MOS Physics and Technology.

The 1998 SISC will be held at the Catamaran Resort Hotel, 3999 Mission Boulevard, San Diego, CA 92109, TEL: (619) 488-1081. The Catamaran is just one block away from the Pacific Ocean (see photo). San Diego is renowned for its weather, its weather, and its weather! Oh, yes, and also its high-tech industry base, the wonderful zoo and wild animal park, and its historic monuments at Old California, all of which are an easy drive from the Catamaran. We hope to see you there!

For registration information and general inquiries about SISC, please contact the Arrangements Chair, Beall Fowler, at Lehigh University, 161 Memorial Drive E., Bethlehem, PA 18015; TEL: (610) 758-3947; FAX: (610) 758-4561; E-MAIL: wbf0@lehigh.edu. Also, for updates on the 1998 IEEE SISC, including upcoming travel, technical program and registration information, we invite you to visit our web site at www.coe.uncc.edu/~edwards/sisc98/.

Daniel M. Fleetwood
Sandia National Laboratories
Albuquerque, NM


 Integrated Reliability Workshop (IRW)

point.gif (30247 bytes)Since 1982, the IEEE International Integrated Reliability Workshop and its predecessor, the Wafer Level Reliability Workshop, have provided an ideal environment for envisioning, developing and sharing reliability technology in semiconductor applications. The Workshop features tutorials, formal paper presentations, open poster sessions, moderated discussion group sessions, and special interest group meetings. The Workshop has developed to focus on a more cross-functional approach to semiconductor reliability engineering by exploring a broad range of topics critically relevant to the semiconductor industry. All Workshop activities take place in a relaxed and rustic setting that promotes an atmosphere of interactive learning. The Workshop is co-sponsored by the IEEE Electron Devices Society and the IEEE Reliability Society.

The 1998 workshop will focus on ensuring semiconductor reliability through component design, characterization, and analysis tools. One embodiment of these reliability tools is Wafer Level Reliability (WLR). WLR is most effective when a proven physical acceleration model is used in the design and application of reliability test structures, test methods, and stress conditions. This year's Workshop will focus on the effective use of WLR to built-in reliability. To this end, the limits to WLR will be addressed.

Technical Papers

Approximately 24 papers will be presented during the workshop in the following topics:

  1. Identification of Reliability Effects - failure mechanisms and sensitivities to materials and manufacturing.
  2. Reliability Models - experimental agreement between short-duration and long-duration test results; limits to accelerated stress; applications for AC, pulsed, and DC conditions.
  3. Reliability Test Structures - design, characterization, uses, and data analysis; integrated on-chip reliability test systems.
  4. Wafer Level Reliability tests and Test Approaches - test and analysis methodologies; reduction in development time; relation to circuit element and package tests, in-line monitors; use and interpretation of WLR data.
  5. Designing-in Reliability - methodologies and concepts; modeling; simulation tools; reliability-driven design rules and checkers; use of WLR for design rule verification.
  6. Customer Product Reliability Requirements - reliability evaluation methodologies; data bases; reporting systems; future reliability targets.

Keynote Speaker

The invited keynote speaker for the workshop is yet to be decided at the time of this writing.

Tutorials

In a continuing effort to enhance the value of the Workshop and to supplement the technical program, we are again offering two tutorials on Monday afternoon. This year's topics will be:

  1. Reliability Issues and the Development of Advanced DRAM Products. Wayne Ellis will discuss the integration of DRAM reliability issues at the system level.
  2. The Analysis of Oxide Reliability Data. Bill Hunter will review state-of-the-art methodologies for analyzing TDDB data, ramped voltage data, and current ramp data.

Discussion Groups

The discussion groups offer an outstanding opportunity to interact with peers on critical reliability topics. These are structured in terms of specific topics as an open forum of discussion, where everyone is encouraged to contribute. Held after dinner, discussions are always spirited, and open inputs from different perspectives provide a valuable experience for all. A tentative list of this year's topics are electromigration, gate oxide reliability, electrostatic discharge (ESD), C-V Characteristics, and Customer Reliability Requirements.

Open Poster Sessions

Attendees will be provided the opportunity to present a poster communicating ideas and results of a technical project or issue during the two open poster sessions. Poster display boards will be available, and you are invited to submit a one-page abstract of your poster presentation for inclusion in the Workshop proceedings.

Special Interest Groups (SIG)

The SIG program has been very successful in fostering collaborative work on important reliability issues. The SIGs provide a forum for interested participants to remain in contact with each other throughout the year to pursue specific projects.

JEDEC 14.2 Meeting

The JEDEC 14.2 Wafer Level Reliability Standards Committee meeting will be held immediately following the Workshop at the same location on Thursday afternoon and Friday morning. Members, alternates and guests are welcome. The cost for accommodations is US $160, which includes Thursday night dinner and lodging and Friday breakfast and lunch. If you have any questions, please call Michael Dion at TEL: (407) 724-7067. If you want to become a member of JC-14.2, please call the JEDEC office at TEL: (703) 907-7560.

The Conference Location

The Workshop is held annually at the Stanford Sierra Camp, located on Fallen Leaf Lake in the Lake Tahoe region of California. This location has served to provide an optimum environment for sharing the types of innovative reliability and physics breakthroughs that have consistently been presented at the Workshop. The schedule is intense from Monday afternoon through Thursday lunch and extends late into the evenings. We do, however, take Tuesday afternoon off to enjoy the beauty of the area. Most attendees hike, while others play volleyball, sail, canoe, or play tennis. Lodging includes clusters of 2 and 3 bedroom cabins furnished in the rustic style of an alpine resort. Each cabin cluster is equipped with shared bathroom facilities. All rooms have decks with magnificent views of Fallen Leaf Lake and surrounding Sierra peaks.

Final Details

The Workshop begins at 2:00 p.m. Monday, October 12, and ends at noon Thursday, October 15. Dress is casual as part of the rustic and work-level nature of the Workshop. The registration fee is US $900 for IEEE members and US $950 for non-members, which includes meals, lodging, and refreshments at the Stanford Sierra Camp; Presentation View Graphs (provided at the meeting); and the 1998 IRW Final Report (published after the meeting). Please visit our IRW web page (http://www.irps.org/irw) for more information or contact: Sally Yankee (IBM Microelectronics), Communications Chair, TEL: (802) 769-3242; E-MAIL: syankee@us.ibm.com or Raif Hijab (Cirrus Logic), General Chair, TEL: (510) 624-7213; E-MAIL: rhijab@corp.cirrus.com.

Sally Yankee
IBM Microelectronics
Essex Junction, VT


1998 Gallium Arsenide Integrated Circuits Symposium

gaalogo.gif (7439 bytes)This year's 20th anniversary of the IEEE Gallium Arsenide Integrated Circuits (GaAs IC) Symposium will be held November 1-4 in the dynamic city of Atlanta, Georgia, site of the 1996 Centennial Olympic Games. Our venue is the beautiful Westin Peachtree Plaza Hotel, conveniently located in downtown Atlanta. Over the last 20 years, this symposium has become the pre-eminent international forum on developments in integrated circuits using GaAs, InP and other compound semiconductor devices. Coverage embraces all aspects of the technology, from material issues and device fabrication, through IC design and testing, high volume manufacturing and system applications. In true Olympic form, the GaAs IC Symposium continues its tradition of presenting the best from around the world in GHz frequency microelectronics. Forty percent of this year's technical papers come from outside the US. This year's program is also indicative of the dramatic adoption over the past several years of GaAs technology for commercial applications in addition to the traditional government supported technology and applications. Major focus areas of this year's GaAs IC Symposium, organized by Mark Wilson and the Technical Program Committee, include state-of-the-art circuits and technology for:

Additionally, the symposium features sessions highlighting: GaAs IC manufacturing issues, new heterostructure device development, device modeling, characterization and reliability, and design techniques and software.

This 20th IEEE GaAs IC Symposium also continues our tradition of providing focused educational opportunities through our Short Course and Primer Course, both held on Sunday, November 1. Jim Komiak has organized a very interesting and highly applicable one-day Short Course on "Power Amplifiers: From Milliwatts to Kilowatts," taught by 5 experts in the industry:

Phil Smith
Sanders, Lockheed Martin Co.

Mike Golio                   
Rockwell Collins

Steve Nelson                
Bosch Telecom

Aryeh Platzker            
Raytheon Advanced Device Center

Mahesh Kumar           
Lockheed Martin GES

This course will focus on the technical details of the technology and design of power amplifiers. In addition, Stephen Long (UCSB) and Donald Estreich (HP) will once again present our Primer Course on the "Basics of GaAs ICs" which is not only a tutorial but is presented within the context of this year's symposium.

To complement the full technical program, the symposium will also have several social events to provide opportunities to interact with colleagues while catching up with the newest technology available on the market. These events include the Sunday evening Opening Reception, the Monday evening Technology Exhibition Reception in the GaAs IC Technology Exhibition Hall, and the Tuesday evening 20th Birthday Party at Atlanta's Hard Rock Cafe. There will also be opportunities for attendees to learn of new products just hitting the market for the III-V microelectronics business through approximately 40 exhibits at the GaAs IC Technology Exhibition. Additionally, potential customers for the latest commercially available GaAs IC's can learn about these in the Vendor Product Forums.

Finally, this year's GaAs IC Symposium will have some new features. At the opening session, we will be presenting our first "Outstanding Paper Award" from the 1997 Symposium to Taiichi Otsuji et al. from NTT for their paper on 80 Gb/s Multiplexers using InAlAs/InGaAs HEMT's. In addition, we are entering our second symposium with support from corporate benefactors. We can already, gratefully acknowledge the support of Watkins-Johnson and Sumitomo Electric Co., USA for our symposium in Atlanta. We also welcome any others who may be interested in joining this year's team.

We hope you'll join us in Atlanta for this special 20th IEEE GaAs IC Symposium. We feel that we have an outstanding technical and educational program which also supports the business we're in.

Registration can be accomplished through Jennifer Lambert of the IEEE by sending a registration form at the following: FAX: +1-732-981-1203; E-MAIL: registrations@ieee.org. To obtain a registration form please telephone IEEE at TEL: +1-800-810-4333.

Further information is available through our web site at: http://www.gaasic.org/ or from the Symposium Chairman, Bill Stanchina, by TEL: +1-310-317-5089 or E-MAIL: weStanchina@HRL.com.

William Stanchina
Hughes Research Laboratories
Malibu, CA


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