Sang H. DhongAn IEEE Fellow is a member of unusual distinction in the profession. It is a recognition conferred only by invitation of the Board of Directors on a person of extraordinary qualifications and experience in the IEEE fields of interest, who has made important individual contributions to one or more of these fields. No more than one tenth of one percent of the total Institute membership may be advanced to Fellow grade in any given year.
A nominee must be a Senior Member of the Institute and have been a member in any grade for at least five years prior to the year of election. A nomination for Fellow must be accompanied by references from at least five current IEEE Fellows. Each nomination is evaluated by the relevant techncial society or council, and all nominations are then rated and ranked by the 26-member IEEE Fellows Committee. Multiple reviewers produce a composite viewpoint that is used in recommending to the Board of Directors suitable candidates for election to Fellow grade.
The IEEE conferred the distinction of Fellow on 256 of its the class of 2001. Here are the nine who were evaluated by the Solid-State Circuits Society.
Sang H. DhongFor contribution to high-speed processor and memory chip design.
Sang H. Dhong received the B.S.E.E. degree from Korea University, Seoul, in 1974, and the M.S. and Ph.D. degrees in electrical engineering from the University of California, Berkeley, in 1980 and 1983, respectively.
He joined IBM’s Research Division in Yorktown Heights, NY in 1983 as a research staff member. There he was involved in the research and development of silicon processing technology, particularly bipolar devices and reactive-ion etching (RIE). From 1985 to 1992, he was engaged in research and development of DRAM cell structures, architectures, and designs, spanning over many generations of IBM DRAMs, from 1-Mb DRAMs to 256-Mb DRAMs. His key contributions in this area are high-speed DRAMs, low-power DRAMs, and NMOS-access transistor trench DRAM cells.
After three years developing one of IBM’s PowerPC microprocessors as a Branch/Icache circuit team leader of 15 designers, he worked on a simple but fast processorcore based on the PowerPC architecture and high-speed embedded DRAM (eDRAM) at the Austin Research Lab of the IBM Research Division, leading, managing, and staffing the high-performance VLSI design group which reached a high of of 25 people from 1995 to 1999. The work resulted in setting a major milestone for the microprocessor industry by prototyping 1-GHz PowerPC processors. Also, the work on high-speed eDRAMs provided the justification for the logic-based eDRAM foundary/ASIC technology offering by IBM, as well as the design basis for eDRAM macros of DRAM-like density with SRAM-like high speed. Since becoming the chief technologist of the Austin Research Lab in 1999, he has continued to work in three areas: fast, low-power embedded PowerPC; superpipelined multigigahertz PowerPC servers; and high-speed eDRAM.
Dr. Dhong is a member of the IBM Academy of Technology.
John J. CorcoranFor contributions to high-performance analog-to-digital converters.
John J. Corcoran received the B.S. degree in electrical engineering from the University of Iowa, Iowa City, in 1968, and the M.S. degree in electrical engineering from Stanford University, Stanford, CA, in 1970.
From 1969 to 1999, he was with Hewlett-Packard Company, first at Santa Clara Instrument Division, then at Hewlett-Packard Laboratories in Palo Alto, CA. His work at HP focused on integrated circuit design in bipolar, CMOS, BiCMOS, CCD, GaAs MESFET, and GaAs HBT technologies. He is presently Manager of the Mixed-Signal Electronics Department at Agilent Laboratories, which develops integrated circuits for instrumentation and communication applications. He has published numerous papers on high-speed A/D conversion and A/D testing.
Mr. Corcoran was coauthor of the paper, “A 1-GHz 6-bit ADC system,” which received the Best Paper Award from the IEEE Journal of Solid-State Circuits for 1987–1988. He received the Best Evening Panel Award from the 1988 International Solid-State Circuits Conference (ISSCC) and the Beatrice Winner Award for Editorial Excellence from the ISSCC in 1992. He has served as Guest Editor of the IEEE Journal of Solid-State Circuits, and from 1994 to 1997, he was the Secretary of the IEEE Solid-State Circuits Council. He presently serves on the AdCom of the IEEE Solid-State Circuits Society.
Masao HottaFor contributions to the development of low-power video-frequency analog-to-digital converters for mixed-signal system large-scale integrated circuits.
Masao Hotta received the M.S. and Ph.D. degrees in electronics from Hokkaido University, Sapporo, Japan, in 1973 and 1976, respectively.
Since 1976, he has been with the Central Research Laboratory, Hitachi Ltd., Tokyo, Japan. He initially engaged in research and development of high-precision monolithic D/A converters with resolution of 14 bits. In 1981, he started research and development of high-speed A/D converters for video use and ultra-high-speed D/A converters for high-definition display applications. Since 1986, he has been a Senior Researcher conducting research on analog circuits and high-precision DACs and ADCs. From 1995 to 1999, He was a Manager of the Advanced Device Development Department, Semiconductor Technology Development Center, Semiconductor & Integrated Circuits Division of Hitachi Ltd. He has worked on the development of microprocessors, memories, RF devices, and DA/CAD systems. He is presently a Senior Chief Engineer & Senior Manager of Advanced Analog Technology Center, Semiconductor and Integrated Circuits of Hitachi Ltd. He is developing RF power amplifier modules, RF transceiver LSIs, and mixed-signal LSIs.
Dr. Hotta served on the technical program committees of the CICC, BCTM, and ASIC/SOC conferences.
Paul James HurstFor contributions to the design of CMOS integrated circuits for telecommunications and magnetic recording.
Paul James Hurst was born in Chicago, IL, in 1956. He received the B.S., M.S., and Ph.D. degrees in electrical engineering from the University of California, Berkeley, in 1977, 1979, and 1983, respectively.
From 1983 to 1984, he was with the University of California, Berkeley as a lecturer, teaching integrated-circuit design courses and working on an MOS delta-sigma modulator. In 1984, he joined the telecommunications design group of Silicon Systems Inc., Nevada City, CA. There he was involved in the design of three mixed-signal CMOS integrated circuits for voice-band modems, including the first single-chip 2400-bps modem, which was initially used in consumer voice-band modems and later in set-top boxes for billing. Since 1986, he has been on the faculty of the Department of Electrical and Computer Engineering at the University of California, Davis, where he is now a Professor. His research interests are in the area of analog and mixed-signal integrated-circuit design for signal processing and communication applications. His research projects have included work on data converters, filters, adaptive equalizers and timing recovery circuits for data communications, and image processing. He has taught (with Professor Richard Spencer) the short course Signal Processing for Magnetic Recording numerous times. He coauthored the fourth edition of the textbook, Analysis and Design of Analog Integrated Circuits (Wiley, 2001). He is also active as a consultant to industry.
Dr. Hurst was a member of the program committees for the Symposium on VLSI Circuits in 1994 and 1995 and was a Guest Editor of the December 1999 issue of the IEEE Journal of Solid-State Circuits. He has been a member of the Program Committee for the International Solid-State Circuits Conference since 1998 and is an Associate Editor of the IEEE Journal of Solid-State Circuits.
Wei HwangFor contributions to high-density cell technology and high-speed dynamic random access memory design.
Wei Hwang re-ceived the B.S. degree from National Cheng-Kung University, the M.S. degree from National Chiao-Tung University, and Ph.D. degree from the University of Manitoba.
From 1975 to 1978, he was an Assistant Professor of Electrical Engineering at Concordia University, Montreal, Quebec. In 1979, he joined the Electrical Engineering Department at Columbia University, New York, as an Associate Professor. Since 1984, he has been a Research Staff Member with the IBM Thomas J. Watson Research Center, Yorktown Heights, NY. Currently, he is also an Adjunct Professor of Electrical Engineering at Columbia University.
He has worked in the areas of semiconductor memories, VLSI CMOS digital circuits, and high-frequency microprocessor design. His current research interests are ulta low-power CMOS/SOI circuits and technology and digital signal processor design for wireless communications. He holds 47 U.S. patents and has authored or coauthored over 100 technical papers and the book Electrical Transports in Solids (Pergamon, 1981).
Dr. Hwang is an active member of the Chinese American Academic and Professional Society (CAAPS), where he has served as President and Chairman of the Board. He has received 16 IBM Invention Achievement Awards, 3 IBM Research Division Technical Awards, and has earned the IBM Research Division honorary title of Master Inventor. He received the Courvoisier Leadership Award and the CAAPS Special Service Awards. He is a member of the New York Academy of Science, Phi Tau Phi, and Sigma Xi.
Stephen H. LewisFor contributions to the development of pipelined analog-to-digital converters.
Stephen H. Lewis received the B.S. degree from Rutgers University, New Brunswick, NJ, in 1979, the M.S. degree from Stanford University, Stanford, CA, in 1980, and the Ph.D. degree from the University of California, Berkeley, in 1987, all in electrical engineering.
From 1980 to 1982, he was with Bell Laboratories, Whippany, NJ, where he was involved in circuit design for magnetic recording. In 1988, he rejoined Bell Laboratories, in Reading, PA, where he concentrated on the design of analog-to-digital converters. In 1991, he joined the Department of Electrical and Computer Engineering, University of California, Davis, where he is now a Professor. His research interests include data conversion, signal processing, and analog circuit design.
Dr. Lewis was an Associate Editor of the IEEE Journal of Solid-State Circuits from 1994 to 1997 and a member of the Program Committee for the International Solid-State Circuits Conference from 1994 to 1998. He is now Editor of the IEEE Journal of Solid-State Circuits.
Akihiko MorinoFor contributions to the development of System-On-A-Chip for multimedia applications.
Akihiko Morino received the B.S., M.S., and Doctor of Engineering degrees from the University of Tokyo, Tokyo, Japan, in 1964, 1966, and 1969, respectively, all in electronics engineering.
He joined the NEC Corporation in 1969, where he initiated the development of ICs and LSIs for computers and telecommunications systems. At NEC, he has been the Assistant General Manager of VLSI CAD Development Division from 1987 to 1988, responsible for the development of CAD tools and systems; Assistant General Manager of C&C Systems Research Laboratories from 1988 to 1990, responsible for the establishment of the infrastructure for System On A Chip development; and Assistant General Manager of VLSI Development Division from 1990 to 1992, responsible for the device and process technologies development for System On A Chip. He was the General Manager of ULSI Systems Development Laboratories from 1992 to 1996, responsible for the development of System On A Chip for multimedia systems and then Chief Engineer of Semiconductor Group from 1996 to 2000. Since June 2000, he has been the Executive Vice President and COO of Semiconductor Leading Edge Technologies, Inc., responsible for device and process development for future applications.
Dr. Morino’s activities with the IEEE include Secretary of the ISSCC Far East Program Committee from 1986 to 1988, Program Chair of the 1991 Symposium on VLSI Circuits, member of the Executive Committee for VLSI Symposia since 1992, Symposium Chair of the 1995 Symposium on VLSI Circuits, Secretary and Treasurer of the Tokyo Section from 1999 to 2000, and Secretary and Treasurer of the IEEE Japan Council from 1999 to 2000.
Hans-Martin Rein For contributions to the design of high-speed silicon and silicon/germanium bipolar circuits, especially as applied to fiber optic systems.
Hans-Martin Rein received the Dipl.-Ing. and Dr.-Ing. degrees in electrical engineering from the University of Stuttgart, Stuttgart, Germany, in 1964 and 1968, respectively.
From 1968 to 1973, he worked in the field of advanced integrated circuits for the Semiconductor Division of AEG-Telefunken, Heilbronn, Germany. As department head, he was responsible for the development of high-speed bipolar circuit families and advanced MOS/CMOS technologies. Since 1973, he has been a Professor at Ruhr-Universität, Bochum, Germany, where he teaches integrated circuits. For many years, his main fields of research have been the design of high-speed analog and digital Si-bipolar ICs as well as modeling of very fast bipolar transistors (including SiGe HBTs), with special regard to high-current operation. He is author and coauthor of about 150 technical papers and of a textbook on integrated bipolar circuits.
One of his main objects has been to find out the operating-speed limits of integrated bipolar circuits by fully exploiting the speed potential of advanced Si-based technologies. For this, adequate design and optimization strategies as well as accurate physical transistor models for circuit simulation have been developed. These tools were mainly applied to the design of ICs for fiber-optic systems. From 1990 to 1994 his team showed, in cooperation with industry, that all speed-critical ICs in 10 Gb/s systems can be realized with Si production technologies. In 1997/98, corresponding results were achieved for a 40 Gb/s system, with record data rates up to 60 Gb/s, applying advanced SiGe technologies.
Recent research work of Professor Rein’s group is focused on the development of low-cost 40 GHz SiGe VCOs and 10 Gb/s receiver arrays for parallel optical-fiber links. Moreover, current problems in high-speed IC design are being investigated, like simulation of substrate coupling (up to 40 GHz) and modeling of the breakdown behavior of bipolar transistors.
Peter W.
VerhofstadtFor sustained leadership and contributions to microelectronics research and development.
Peter W. J. Verhofstadt received degrees in electrical/computer engineering from the Technische Universiteit Eindhoven, Eindhoven, the Netherlands, in 1961 and 1963.
After a brief period as a Research Assistant at the T.U. Eindhoven, he joined the Siemens Research Laboratories in Munich, Germany, where he worked on real-time process control computer systems. In 1965, he began working at Eurocontrol in Brussels, Belgium, in the area of air traffic control radar, display, and data processing systems. In 1966, he joined the Transitron Corporation, Wakefield, MA, as Design and Applications Manager for Digital Integrated Circuits. During this period, he worked on, among other things, the development of the semiconductor industry’s first semiconductor memory device.
From 1970 to 1987, he was with Fairchild Semiconductor in Mountain View and Palo Alto, CA, in the areas of bipolar and CMOS digital integrated circuits, semiconductor memories, microprocessors, digital signal and image processing, and CAD. He transferred to the National Semiconductor Corporation in 1987, where he continued to manage the former Fairchild microprocessor organization. He was on a sabbatical assignment with the Semiconductor Research Corporation in Research Triangle Park, NC, during 1989 and 1990. In 1991, he joined the Semiconductor Research Corporation, where he is currently Executive Vice-President and Chief Scientist. In 1996, he was appointed Vice President of West Coast Affairs, San Jose, CA, in addition to his role in Design Sciences. He has authored or coauthored more than 25 papers and holds several patents.
Mr. Verhofstadt is a former Chairman of the International Solid-State Circuits Conference, the IEEE Solid-State Circuits and Technology Committee, and the Computer Society Computer Elements Committee. He has been a member of the IEEE Computer Society Governing Board and is now a Golden Member of the Computer Society. He has been Program Cochair of the VLSI Circuits Symposium, Cochair of the International Microelectronics Congress in Munich, Germany, and a founding member of the Asilomar Microprocessor Workshop. He is a past President of the IEEE Solid-State Circuits Council and recipient of the IEEE Third Millennium Medal.