About the VenueRihga Royal Hotel Kyoto Kyoto has nearly 2,000 shrines and temples, six historical preservation districts and an abundance of beautiful natural scenery. The City of Kyoto was founded as "Heiankyo" in 794 A.D. It flourished as the capital of Japan for approximately 1,000 years and was the birth site of the quintessential Japanese culture and traditions one finds throughout the country today. It is home to various national treasures worthy of global pride as well as many historical buildings and traditional arts and crafts. The kimono industry of Kyoto is world reknowned. The Rihga Royal Hotel is located in the heart of Kyoto within walking distance of the Kyoto Station. |
The Symposium on VLSI Circuits will meet 1416 June 2001 in Kyoto, Japan at the Rihga Royal Hotel. This year the technical program committee has reviewed close to 170 submissions to the conference. By the time readers receive this issue of the Newsletter, the Program Committee will have selected the top 40% of submissions for inclusion in the technical program. The three days of technical presentations and informal evening rump sessions are a companion conference to the Symposium on VLSI Technology, which precedes it at the same hotel. The one-day overlap in the schedules for the Technology and Circuits meetings features a Short Course, Physical Design for Low Power and High Performance Microprocessor Circuits, as well as a Joint Rump Session on Merits/Limitations of GaAs, SiGe, Bipolar, SOI CMOS, and bulk CMOS in RF.
The scope of the VLSI Circuits Symposium covers all aspects of VLSI circuits, such as:
circuits for digital, analog, memory, communications, and signal
processing applications, including A/D and D/A
processing applications, including A/D and D/A converters, mixed analog/digital
functions, and interface circuits
systems and architectures related to VLSI circuits
fundamentals related to the above subjects, including innovative circuits and
device structures.
new System On A Chip circuit applications, such as MEMS
The emphasis is on circuit design, and papers are chosen on the basis of originality and quality. Although the circuits need not necessarily be implemented in a semiconductor chip, measured results, particularly for analog submissions, are key selection criteria. There will be four invited papers on BSIM4 MOSFET modeling, digital vision chips, flat panel displays, and digital light projection.
Invited papers are always a high point of the Symposium; they focus on technical information and business implications of technology change, presented by leaders in their fields.
Professor Chenming Hu from the University of California, Berkeley will be describing a BSIM4 model for digital and RF circuit design. The underlying physics of this industry standard model and the associated activity that has successfully blended device physics research with predictive model development will be described.
Professor Masatoshi Ishikawa of the University of Tokyo will be describing the Digital Vision Chip and its application to real-time high-speed vision systems.
Dr. Kiyoshi Yoneda of the Sanyo Electric Co. Ltd., will outline the development of flat panel displays for future mobile applications.
Finally, Mr. Peter F. van Kessell of Texas Instruments will be delivering a paper on processing electronics for DLP Systems. He will be describing the circuits associated with this application of MEMs devices to video display systems.
About the SymposiaSince 1987, VLSI Circuit Symposia and VLSI Technologyís Symposia have provided opportunities for technologists and circuit and system designers to hear technical presentations and to interact. The meeting location alternates each year between the United States and Japan. From the beginning, these two symposia have provided an intense forum for international researchers and engineers to openly discuss and exchange new ideas and directions. The paper sessions are augmented with workshops, invited speakers, and evening rump sessions. The meetings are organized to allow participants substantial time to interact at breaks, meals, and numerous evening events. The VLSI Circuits Symposium sponsors continue to be the IEEE Solid-State Circuits Society and the Japan Society of Applied Physics, in cooperation with the Institute of Electronics, Information, and Communication Engineers of Japan. |
Evening rump sessions are organized around a controversial topic, and experts are recruited to present their divergent views. All aspects of the issue are explored, and a spirited discussion ensuesactive audience participation is encouraged! This year, the rump session topics for the Circuit Symposium are:
Diverse DRAM Architectures: Why and Who Wins?
Power Supplies for Future System LSIs
Can Startups Outperform Large Companies?
A closer look at the rump session on Diverse DRAM Architectures gives a good idea of the opportunity these sessions provide for candid discussion of areas of interest by experts in these areas. Today, several DRAM architectures are available, and many factors will be discussed for the trade-off between cost and performance. There will be different trade offs across various application areas from high-end server to desktop PC, to consumer markets. Thus, the discussion will center on which DRAM architecture will be the best for increasing the system performance, at the same time being low cost to fit many purposes.
Another special feature of these Symposia is the one-day overlap in the schedules of the Technology and Circuits Symposia. This is an excellent opportunity to meet with members of the opposite discipline to share experiences, frustrations, and ideas for the future. In addition to these impromptu meetings, there is also a Joint Rump Session organized by members of both the Circuits and Technology Symposia committees. This years topic is Merits/Limitations of GaAs, SiGe, Bipolar, SOI CMOS, and Bulk CMOS in RF: Whos the Winner in 2005?
Masataka Matsui of Toshiba and Greg Taylor of Intel have organized an excellent one-day Short Course on Wednesday, 13 June 2001. The topic is Physical Design for Low Power and High-Performance Microprocessor Circuits. The agenda includes talks by noted experts representing the entire spectrum of the industry:
overview of physical design
interconnect design for 1-GHz microprocessors
physical design of VT-CMOS
high performance variable Vdd digital design
physical design of embedded DRAM SOC
physical design for low voltage at high speed
physical design for low power
This Short Course is an intense one-day program intended to give attendees an excellent overview of the topic as well as to provide the latest developments in the area. This represents a rare opportunity to have presentations describing work in such timely technical areas and promises to continue the record of successful, engaging, and highly educational Short Courses.
For registration and other information, visit the VLSI SYMPOSIA home page at www.vlsisymposium.org or contact the Conference Managers: in Japan, email: vlsisymp@bcasj.or.jp and in the United States, email: vlsi2001@aol.com.
David B. Scott
Conference Cochair
2001 Symposium on VLSI Circuits