SSCS IEEE Fellows for the Class of 2004

An IEEE Fellow holds the highest grade of IEEE membership. Elevation to Fellow recognizes unusual distinction in the profession, and is conferred by the IEEE Board of Directors upon a person with an extraordinary record of accomplishments in any of the IEEE fields of interest. The accomplishments honored contribute significantly to the advancement of engineering, science, and technology. After a rigorous evaluation process performed each year by the IEEE Fellow Committee, a slate of candidates is proposed to the IEEE Board of Directors for approval.
The number of successful candidates in any year must not exceed one-tenth of one percent of IEEE members. For 2004, of the 260 Fellows elevated, the following five were evaluated by the Solid-State Circuits Society. An additional 13 SSCS members also have been elevated and will be listed in the July issue.

Anantha P. Chandrakasan
For contributions to the design of energy-efficient integrated circuits and systems

Anantha P. Chandrakasan received his BS, MS, and PhD degrees in electrical engineering and computer sciences from the University of California, Berkeley, in 1989, 1990, and 1994, respectively. Since September 1994 he has been with the Massachusetts Institute of Technology, Cambridge, where he is currently a professor of electrical engineering and computer science.
He has received several awards including the 1993 IEEE Communications Society’s Best Tutorial Paper Award, the IEEE Electron Devices Society’s 1997 Paul Rappaport Award for the Best Paper in an EDS publication during 1997, and the 1999 Design Automation Conference Design Contest Award.
His research interests include low-power digital integrated circuit design, wireless microsensors, ultra-wideband radios, and emerging technologies. He is a coauthor of Low-Power Digital CMOS Design (Kluwer Academic Publishers, 1995) and Digital Integrated Circuits (Pearson Prentice-Hall, 2003, 2nd edition). He is also a coeditor of Low-Power CMOS Design (IEEE Press, 1998) and Design of High-Performance Microprocessor Circuits (IEEE Press, 2000).
He served as a technical program cochair for the 1997 International Symposium on Low-Power Electronics and Design (ISLPED), VLSI Design ‘98, and the 1998 IEEE Workshop on Signal-Processing Systems. He was the signal processing subcommittee chair for ISSCC 1999–2001, the program vice-chair for ISSCC 2002, and the program chair for ISSCC 2003. He was an associate editor for the IEEE Journal of Solid-State Circuits from 1998 to 2001. He serves on the SSCS AdCom and is the technology directions chair for ISSCC 2004.

Beomsup Kim
For contributions to integrated circuits for high-speed communication systems

Beomsup Kim re-ceived his BS and MS degrees in electronic engineering from Seoul National University, Seoul, Korea, in 1983 and 1985, respectively, and his PhD in electrical engineering and computer sciences from the University of California, Berkeley, in 1990. From 1990 to 1991 he was with Chips and Technologies Inc., San Jose, California, where he was involved in designing high-speed signal-processing ICs for disk drive read/write channels. Between 1991 and 1993 he was with Philips Research, Palo Alto, Calfornia, conducting research on digital signal processing for video, wireless communication, and disk drive applications. In 1994 he joined Korea Advanced Institute of Science and Technology (KAIST), Taejon, Korea, as a faculty member with the department of electrical engineering. During 1999 he took a sabbatical leave at Stanford University and also consulted for Marvell Semiconductor Inc., San Jose, California, on the Gigabit Ethernet (802.11ab) and wireless LAN (802.11b) DSP architecture. In 2001 he started Berkana Wireless Inc. with Cormac Conroy and is CTO/VP Engineering for the company. His research interests include mixed-mode signal-processing IC and system design for wireless communication, telecommunication, disk drives, local-area networks, high-speed analog IC design, and VLSI system design.
Dr. Kim is a corecipient of the 1991 Best Paper Award for the IEEE Journal of Solid-State Circuits and received the KAIST EE Department Best Lecture Award in 1997. Between June 1993 and June 1995 he served as an associate editor for the IEEE Transactions on Circuits and Systems II: Analog and Digital Signal-Processing Society. In 1999 he was one of four lecturers for the Gigabit Ethernet Short Course at the IEEE International Solid-State Circuits Conference.

David Barry Scott
For contributions to CMOS and BiCMOS technology and circuits

David B. Scott received his BSc degree in physics and his MASc and PhD degrees in electrical engineering, all from the University of Waterloo, Waterloo, Ontario, Canada. He is a Texas Instruments Fellow in Silicon Technology Development, working on the design and fabrication of high-performance, low-leakage products. His past activities at TI include work on CMOS process technology, memory design, high-speed telecom circuits, and reliability modeling. He has presented and published over 40 papers in various journals, conferences, workshops, and books. Dr. Scott is an inventor or coinventor in over 25 patents. In addition to his work at TI, he has served the technical community in various capacities, including: chair of the 2002 VLSI Circuits Symposium; associate editor of the IEEE Journal of Solid State Circuits; ISSCC and IEDM paper selection committee member; and as a panelist, moderator, or organizer for evening panel discussions at various conferences. He is actively involved with the ACM/IEEE International Symposium on Low-Power Electronics and Design.

Christer Svensson
For contributions to single-phase clocking and high-speed CMOS circuits

Christer Svensson is a professor of elec-tronic devices at Linköping University. He was born in Boras, Sweden, in 1941 and received his MS and PhD degrees from Chalmers University of Technology, Sweden, in 1965 and 1970, respectively. He was with Chalmers University from 1965 to 1978, where he performed research on MOS transistors, nonvolatile memories, and gas sensors. He joined Linkoping University in 1978, and since 1983 he has been a professor of electronic devices. Svensson initiated a new research group on integrated circuit design and pioneered the fields of high-speed CMOS design in 1987 and low-power CMOS in 1993. His present interests are high-performance and low-power analog and digital CMOS circuit techniques for computing, signal processing, and sensors. Svensson has published more than 170 papers in international journals and conferences and holds ten patents. He founded several companies, including Switchcore and Optillion, where he serves as a director. He also has served on the board for the Swedish Research Council for Engineering Sciences and on the IEEE SSCS AdCom. He was awarded the Solid-State Circuits Journal 1988–89 Best Paper award. He is a member of the Royal Swedish Academy of Sciences and the Royal Swedish Academy of Engineering Sciences.

Osamu Tomisawa
For contributions to low-power, high-speed integrated circuits

Osamu Tomisawa received his BS and MS degrees in electronic engineering from Kyoto University in 1969 and 1971, respectively. He received his PhD degree in electrical engineering from Osaka University in 1980. Tomisawa joined Mitsubishi Electric Corporation in 1971 where he has been working on memory, logic, and processor design. From 1976 to 1979 he worked on high- speed MOS gate array development; from 1979 to 1980, he worked on high-speed SRAMs. Tomisawa is a coinventor of the “divided word line” patent, which is a hierarchical word line structure of memory. He spent one year (1980) at the University of California, Berkeley, as a visiting scholar, where he did research on VLSI computer architecture and participated in a RISC project. He returned to the Mitsubishi Electric LSI Laboratory in 1981. Until 1992, Tomisawa was general manager, LSI Design Department in the LSI Laboratory of Mitsubishi Electric, where he supervised many projects, including 32-bit CPU chips, DSPs, and custom processors. From 1992 to 1995 he was general manager, Advanced MCU and MPU Department, Kita-Itami Works, Mitsubishi Electric, working on 16-bit and 32-bit MCU development and technical marketing. From 1996 to 1997 Tomisawa supervised a 32-bit RISC MCU development project. From 1998 to 1999, he was president and CEO of VSIS Inc. in California, working on System On Chip. From October 1999 to November 2001 he was the general manager of the Design Engineering Center, Mitsubishi Electric and Electronics USA Inc., North Carolina. Currently, Tomisawa is a professor at Kochi University of Technology.