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| AP-ASIC Organizing Committee Members with Conference participants at Yonsei University, Seoul Korea. |
The first IEEE Asia-Pacific Conference on ASICs (AP-ASIC'99), hosted by IEEE ED/SSC Seoul Chapter, was held 23-25 August 1999 at Yonsei University, Seoul, Korea. The objective of AP-ASIC was to promote research and development activities in solid-state circuits within IEEE Region 10 countries. The conference will be held biannually every even-numbered year, except for the inauguration year of 1999. During AP-ASIC'99, the international steering committee members have been elected unanimously; Chairman, Prof. Moon-Key Lee (Korea); Vice Chairmen, Dr. Hajime Ishikawa (Japan) and Prof. Chorng-kuang Wang (Taiwan); and Secretary, Prof. Kwang S. Yoon (Korea).
AP-ASIC'99 featured a half-day tutorial session, two keynote speeches, two invited papers, and 102 paper presentations (91 papers in 21 regular sessions and 11 papers in four special sessions). The total number of registrants from 10 countries (Korea, Taiwan, United States, Japan, Australia, Singapore, Canada, Portugal, Germany, and Macao) was 198, including 43 tutorial attendees. The half-day tutorial session covered topics on Advanced Memory and CDMA systems. Two keynote speakers in the plenary session, Dr. Hyung-Kyu Lim (Samsung Electronics Co., Korea) and Dr. Nicky Lu (Etron Technology, Inc., Taiwan) talked about semiconductor memories in the year 2001 and beyond and about trends in the IC industry in the 21st century, respectively. Two invited papers on Associative Memory and Neural Circuits were given by Dr. Komatsu Asada (University of Tokyo, Japan) and Dr. Chung-Yu Wu (National Chiao Tung University, Taiwan). The four special sessions featured Merged Memory with Logic (six papers) and ASIC for Mobile Communication Systems (five papers).
The 21 regular sessions included:
A paper of special interest in the Microprocessor and Microcontroller session was entitled "A fail-safe microprocessor using dual synthesizable processor cores," by Kotaro Shimamura et al., Hitachi, Japan. It illustrated the design of processor core by using full custom and synthesizable approaches. Comparisons were made between these two approaches. Another paper, entitled "Semi-folded instruction format for VLIW architecture," by Won-Kee Hong et al., Yonsei University, Korea proposed a semi-folded instruction format for VLIW architecture and benchmarked the format by comparing cache miss rate for five different cache architectures. In the Microprocessors and Design Reuse session, another paper of note, entitled "A dual issue queued pipelined Java processor TRAJA-Toward an open source processor project," was presented by Naohiko Shimizu et al., University of Tokai, Japan.
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| AP-ASIC Organizing Committee Members with Conference participants at Yonsei University, Seoul Korea. |
During AP-ASIC'99, the IEEE SSCS membership drive desk was set up next to the on-site registration desk. The SSCS special membership promotion program that was offered enabled 30 students to participate in AP-ASIC'99.
The Asia-Pacific Conference on ASICs 2000 (AP-ASIC 2000) will be held in Cheju, Korea, 28-30 August 2000. The AP-ASIC 2000 Program Committee invites contributions in the areas of Analog Circuits, Digital Circuits, Communication Circuits, Memory Circuits, Microprocessors, Signal Processing Circuits, Design Reuse and IP, Sensor and Image Circuits, MEMS Circuits, and Design for Testability and Yield. Prospective authors should submit a file in pdf format, camera-ready, about four pages in length, in double columns. Electronic submission is the only acceptable format. Email the pdf file directly to asic2000@ap-asic.org to be received by 31 March 2000. For more update information, please visit the Web site at www.ap-asic.org.
Kwang S. Yoon
Secretary, IEEE Seoul Chapter
ksyoon@dragon.inha.ac.kr
Conference proceedings with CD-ROM (IEEE Cat. No. 99EX360, ISBN: 0-7803-5705-1) are available from the IEEE (E-mail: customer-service@ieee.org).