Retrospective
of ESSCIRC 2001
The European Solid-State
Circuits Conference (ESSCIRC 2001) was held 18-20 September in Villach,
Austria, a hotbed for microelectronic activities. The conference was a success,
with 362 registered participants from 22 countries. Unfortunately, 30 registrants
cancelled in the aftermath of the terrorist attacks of 11 September 2001.
The conference was a first-class international forum for circuit designers
to discuss practical aspects of integrated-circuit design. The technical
program included 8 invited papers, 98 regular papers, and 31 posters, which
were selected out of 196 submitted contributions from all over the world.
Invited Presentations
The keynote address, given by Willy Sansen of KUL, was titled SOC
design from a mixed-signal perspective. He described the various
performance-limiting effects and emphasized that achievable analog performance
still relies both on the art of making the correct compromise and the
experience that has been built up over decades.
Wolfgang Pribyl of Austria Mikro Systeme explored the position of silicon
foundries for mixed-signal services and sketched the major success factors
and future chances for small- and medium-sized foundries.
Andreas Kaiser of IEMN-ISEN presented the Potential of MEMS components
for reconfigurable RF interfaces in mobile communication terminals.
Yoshiaki Hagiwara of Sony, Tokyo gave a fascinating description of what
we can expect for future homes in Microelectronics for home entertainment.
Due to events of 11 September, he could not attend in person, but his
presentation via a conference connection was exemplary and well received.
Stefan Rusu of Intel presented Trends and challenges in VLSI technology
scaling towards 100 nm, in which he outlined the challenges and
achievements that lie ahead for integrated circuits in the next decade.
He concluded that there is no fundamental barrier to prevent the extension
of Moores law into the next decade.
Josef Hausner of Infineon, Munich, talked about Integrated circuits
for next-generation wireless systems, explaining the challenges
and requirements of integrated circuits as the enablers for the new Universal
Mobile Telephone System (UMTS).
Chris Rowen of Tensilica showed the capabilities of Automated Processor
Generation for System-On-A-Chip design. He concluded that new methodologies,
tools, and processor foundations will be required for the shift to application-specific
processors with the efficiency of application-tuned silicon.
Finally, Leonard Gagea of TTChip, Vienna, explained and analyzed the architecture
of communication buses for safety-critical applications like x-by-wire
systems.
Technical Program
The outstanding technical program included topics on Synthesisers, Modulators/Demodulators,
Systems On A Chip, Digital Systems, Optical Circuits, Memory and Interface
Circuits and Circuit Design Techniques. Keeping with tradition, the contributions
were dominated by mixed-signal and RF papers like Voltage Regulators,
RF/IF Amplifiers, Data Converters, CMOS Imagers, and Power Circuits.
In the RF area one of the highlights was A CMOS 10-GHz voltage-controlled
LC-oscillator with integrated high-Q inductor, by W. De Cock and
M. Steyaert of KUL, analyzing the sources of Q-degradation. In this realization
the Q of the integrated inductor is not the limiting factor any more and
the reported phase noise performance of -127 dB/Hz at a frequency offset
of 3 MHz in CMOS is an excellent result. Equally interesting was the Injection
locking scheme for precision quadrature generation, presented by
R. Melville of Agere. Here, the principle of injection locking, described
some 60 years ago, is used to yield excellent performance of ring oscillators,
which otherwise exhibit high phase noise.
In the data converter arena, much attention was given to band-pass Delta-Sigma
ADCs, with two interesting contributions from T. Salo et al. of Helsinki
University of Technology about An 80-MHz band-pass delta-sigma modulator
for a 100-MHz IF-receiver and A fourth-order band-pass delta-sigma
modulator using second-order band-pass noise-shaping dynamic element matching
by T. Ueno et al. from Toshiba. Highly integrated mixed-signal circuits
were reported in several papers, such as the fully Integrated analog
front-end macro for cable modem applications in 0.18-µm CMOS
from A. Wiesbauer et al. of Infineon.
In optical communications
a tendency for even higher speed and a high level of integration using
deep sub-micron CMOS was observed. Good examples in this area were the
papers from A. Younis et al. from RocketChips/Xilinx about a Low
jitter, low power, CMOS 1.25-3.125 Gb/s transceiver and the Fully
integrated CMOS light to logic fiber-optic receiver circuit from
K. Schrödinger et al. of Infineon. The paper High-speed CMOS
analog Viterbi detector for 4-PAM partial response signaling by
B. Zand et al. of the University of Toronto describes a high-speed mixed
analog-digital partial response Viterbi decoder. Of interest is the combined
analog branch-metric and add-compare-select unit.
On the subject of memories, H. Kikukawa et al. of Matsushita and Mitsubishi
presented A 0.13 µm 32 Mb/64-Mb embedded DRAM core with high
efficient redundancy and enhanced testability in a 0.13-µm
triple-well 4-level copper embedded DRAM technology. A 1Kx1K high
dynamic range CMOS image sensor with on-chip programmable region-of-interest
readout by O. Schrey et al. of the Fraunhofer Institute in Duisburg
highlighted the important domain of sensors for machine vision applications.
Finally A. Lelah et al. from France Telecom & ENST presented A
CMOS VLSI pilot and support chip for a liquid crystal on silicon 8x8 optical
cross-connect demonstrator, suitable for high-speed WDM transport
networks.
Banquet Address
One of the most entertaining and well-received presentations was given
by Shyam Kamath of California State University, Hayward, titled What
is Silicon Valleys success based on : silicon or entrepreneurship?
It placed silicon and entrepreneurial attitude face-to-face, combining
economics with managerial aspects.
Educational Sessions
Two educational sessions were given, one before and one after the conference.
The workshop System On Chip emphasized networks on chip, intrinsic
computing efficiency, grain size, reconfigurable hardware and RF systems
on chip. It was presented by A. Jantsch, J.P. Soiinen, M. Forsell, and
S. Kumar of KTH, Sweden; M. Millberg and J. Ölberg of VTT Electronics,
Oulu, Finland; J. Huisken of Philips, The Netherlands; and M. Steyaert
of KUL, Belgium. The tutorial Electronics for automotive covered
smart power semiconductors for innovative automotive solutions, future
automotive communication architectures, and innovative SOI technology
for 12-V/42-V power supplies. It was presented by H. Zitta and C. Preuschoff
of Infineon and C. Mochel of Atmel, Germany.
Details about purchasing the Proceedings of past ESSCIRC conferences are
available at www.esscirc.org/
proceedings.htm
ESSCIRC 2002 and ESSDERC 2002 will be held jointly 24-26 September 2002
in Florence, Italy
(ele.unipv.it/ esscirc2002)
Return to contents
|