A JSSC Classic Paper:

The Gilbert Cell, the Linear Mixer with Gain,
in CMOS or Bipolar

The Gilbert cell, initially designed with bipolar transistors to operate as a precision multiplier, is widely used in modern communication systems as a mixer and frequency translator. The Gilbert cell offers advantages such as high conversion gain and high port-to-port isolation. Its principle of operation is technology independent and can be realized in bipolar or CMOS processes. Because of their low fabrication costs, Gilbert cells are appropriate for high-level integration and realize good high-frequency performance. Manolis T. Terrovitis and Robert G. Meyer summarized these traits that make the Gilbert cell so popular in recent papers in the June 1999 and October 2000 JSSC.
Barrie Gilbert first introduced "A precise four-quadrant multiplier with subnanosecond response" at the 1968 ISSCC. Donald O. Pederson and James E Solomon, editors of the December JSSC issue where Gilbert's full paper first appeared, noted "Linear IC applications are undergoing tremendous growth due largely to the development and acceptance of the integrated operational amplifier." They also noted that "the twenty-five cent IC no longer seems a remote possibility."
In the December 1982 JSSC, David C. Soo and Robert G. Meyer first reported NMOS fabrication of the multiplier with performance adequate for signal processing and linearity comparable to bipolar circuits in "A four-quadrant NMOS analog multiplier." Soo and Meyer recommended these applications of the multiplier circuit; automatic gain control, waveform generation, modulation, demodulation, and frequency translation. Analog MOS large-scale integrated circuits had been demonstrated as early as 1978 by D. A. Hodges, P.R. Gray, and R.W. Broderson in "Potential of MOS technologies for analog integrated circuits," published in the June 1978 JSSC.
Since its appearance, Gilbert's 1968 paper has become the fifth most frequently cited paper from the JSSC and the earliest JSSC paper to be cited over 100 times. The original paper is available on the Solid-State Circuits Digital Archive 2002 DVD. See page 13. (IEEE product # JD3755B).


The Beginning of Translinear Circuit Design
In the autumn of 1954, I met my lifetime companion and partner, whom we'll identify just by the initials "BJT," at a research lab in the south of England. After a decade of deepening familiarity and joyous discovery together, we moved to Oregon, to continue our adventures at Tektronix. This company, dedicated to fashioning the world's finest oscilloscopes, took the unusual step in 1965 of establishing an integrated circuit production line, to support future instrumentation.
Although the wafers were only one inch in diameter, this "move to monolithic" was to herald a new life for BJT, and was unquestionably the most significant milestone in my life. This was a time of charming naiveté, long before microprocessors and memories made an appearance. IC masks were generated by taking an Exacto knife to "Rubies" and cutting them practically straight from hand-drawn, slide-rule-designed schematics. SPICE was brewing in Berkeley, but not quite ready for serving.
At Tektronix, my job was to design the new 7000-series oscilloscope, using custom ICs to address the growing sophistication and bandwidth of these instruments. However, I had enormous latitude to experiment in this new medium, which allowed me to develop many interesting and curious circuit cells. Equally exciting were novel semiconductor devices exploiting "super-integration." Unlike conventional node-by-node circuit development, where the physical extent of a transistor had no fundamental bearing on the function, these structures exploited the juxtaposition of numerous transistor fragments-bits of NPNs and lateral PNPs-to elicit specific and practically useful functions, both analog and logical. I2L was one later development of these ideas.
Meanwhile, analog design was taking the first tentative steps to explore new possibilities presented by the unique properties of monolithic fabrication, namely: (1) the close matching and (2) isothermal operation of (3) many essentially identical BJTs. Design in this medium was still in its infancy. Only a handful of basic cells were widely known and used. Two youngsters were especially promising: the differential pair and the current mirror. An inevitable coalition was only steps away.
Each of these cells comprised only two transistors. But what a wealth of possibilities they afforded! How predictable their mathematics, over huge spans of collector current! What made the "diff pair" so intriguing was the possibility of using it as an analog multiplier by applying a voltage-mode signal across its base nodes and varying the "tail" current (the common emitter bias) to alter the magnitude of the differential collector current. As it happened, the 7000-series needed such a multiplier to provide a variable gain function in circuitry buried deep in the system, which could be controlled at a distant location (the front panel). Its bandwidth needed to extend from DC to several hundred megahertz.
The diff pair multiplier was well-suited to this challenge, except for one problem: the linearity of the transconductance from the base nodes to the output was poor (the nonlinear tanh function). On the other hand, the current mirror was basically a pure current-mode circuit with good linearity over a huge range of currents; and, as a signal processing element, it exhibited a bandwidth close to the fT of the transistors, which, in Tek's first-generation process, peaked at about 600 MHz.
So, the stage was set, but the plot began with a question: How could the variable-gain aspect of the diff pair be combined with the linearity of the current mirror? The felicitous answer sprang, as is so often the case, by toying with "What If?"Ñthe most potent path to invention.
What if we placed two current mirrors side-by-side, with their output-side transistors facing inward, and all the emitters grounded? In this topology, their functions are completely independent. Now, what if we take that Exacto knife and cut loose the lines to the two inner emitters from their ground ties? What happens if we then rejoin these two emitters at an independent node? The inner transistors have just become a simple differential pair, but driven now from the difference voltage across the outer, diode-connected transistors of the remaining fragments of the mirrors. What if we now provide a variable current to that new center node, to bias this fledgling diff pair? Bingo.
When the excitement of discovery had abated, and pencil was placed more thoughtfully to paper, it transpired that, with this simple bit of do-it-yourself surgery, the four transistors had suddenly become something radically different. We had a new entity: a purely current-mode multiplier cell that operates in two-quadrants of the algebraic plane. Adding a second similarly biased diff pair, their bases driven in parallel with the first, but whose collectors are cross-connected to the output, created the four-quadrant sub-nanosecond multiplier described in the paper.
That was only the beginning of translinear circuit design, which quickly blossomed into dozens of fundamentally new cells, and which continues to bear fresh fruit to this day.


If you would like to contact the IEEE Webmaster
© Copyright 2003, IEEE. Terms & Conditions. Privacy & Security

IEEE logo