The 2001 International Symposium on VLSI Technology, Systems, and Applications was held 18Ð20 April in Hsinchu, Taiwan. The objective of the conference was to bring together scientists and engineers from all over the world who are actively engaged in research and development of VLSI technology, systems, and applications, to discuss current progress in this field with the experts from Taiwan's local industry. There were two main changes made by the organizing committee: shifting the meeting from the traditional June time frame to take advantage of the beautiful spring season in Taiwan and moving the conference location from Taipei to Hsinchu, the center of advanced integrated circuit design and manufacturing in Taiwan. This year's meeting attracted more than 600 attendees, a substantial increase over previous years and a strong indication of success, particularly considering the current economical climate.
Three keynote speeches were delivered by leading thinkers from the United States, Europe, and Japan to position the theme of the 2001 VLSI-TSA on systems and complexities. The scaling of silicon technology provides the possibility of creating complete systems on one integrated circuit chip. In "Systems on a chip from a system's perspective," Gene Frantz (Senior Fellow, Texas Instruments, USA) discussed the why, when, and who of Systems-On-A-Chip to dramatically improve system-level performance, cost, and power. In "Future is in wireless," Jari Pasanen (Vice President Research and Technology Access, Nokia, Finland) detailed how wireless terminal manufacturers address the various design challenges in RF and baseband to ensure fast product creation with rapidly increasing system complexity in the Third Generation mobile communications systems for wireless Internet. Toyoki Takemoto (Executive Vice President, STARC, Japan) described the promotion of industrial/academic joint projects and precompetitive R&D activities on circuits and systems in "Joint activity for semiconductor R&D and role of Semiconductor Technology Academic Research Center (STARC)."
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Dr. Tak Ning, Symposium Chair, at the opening session. |
In addition to the keynote presentations, the technical sessions featured two parallel tracks; one on Technology and the other on Circuits and Applications. With the 14 invited papers as the backbone setting the stage for technical interactions, the main contents of VLSI-TSA were the 66 contributed papers, selected from about 120 excellent submissions from all over the world, representing original works on the latest advances in the area of VLSI technology, circuits, and applications.
The Technology track consists of five sessions on the topics of device technology and reliability, DRAM, RF and System-On-A-Chip technology, gate dielectrics, and interconnects. There were a total of six invited papers and 33 contributed papers.
In the Device Technology session, G. Shahidi from IBM gave a review of SOI technology. Shahidi's theme was that SOI development is driven by high-end microprocessors, but it will benefit many other applications, such as RF and low power. B. Mizuno of Matsuhita Electric described the need for and challenge of ultra-shallow junctions. An approach to ultra-shallow junctions is by plasma doping followed by RTA or laser anneal.
In the DRAM session, K. Kim from Samsung reviewed the status of 1T1C FRAM technology. Recent progress suggests that FRAM with a cell size of 10F2 can be realized, making FRAM within a factor of two of DRAM in cell size. Other highlights included a paper describing a 6F2 DRAM cell in 0.13-µm technology. Another paper showed that CMOS devices in an embedded DRAM technology can have the same performance as CMOS devices in a logic technology of the same lithography generation.
The RF and System-On-A-Chip Technology session featured two invited papers, one by D. Bishop of Lucent Technologies on the role of MEMS in optical communications and one by J. Burghartz of Delft University of Technology on tailoring logic CMOS devices for RF applications. With some care, CMOS logic devices can be very good for RF applications.
High-K gate dielectric is a hot research topic. Most of the papers in the gate dielectric session dealt with high-k gate dielectrics, including an invited paper by M. Houssa from the Katholieke Universiteit Leuven, which reviewed the electrical and physical characteristics of high-K dielectrics.
Highlights of the Interconnect session included a paper from TSMC on using the stress current to raise the temperature of the metal lines being tested for electromigration. The method reduces the time needed for test and feedback in the development process.
The Circuits and Applications track consisted of four short sessions on wireless, networking ICs, communication ICs, and mixed signals; and three long sessions on multimedia processing, specialized circuit techniques, and logic circuits. There were a total of eight invited papers and 30 contributed papers from seven countries. About 40% of the papers were from the United States, and 37% were from Taiwan.
Bob Brodersen of UC Berkeley gave an invited talk on Wireless System-on-a-Chip (SOC) Design. Brodersen used wireless systems as an example of System-On-A-Chip, which is better positioned to exploit parallelism inherent in the application. This opportunity can lead to a more hardware-dominated solution that offers much better efficiency in power, area, and performance. In this session, a paper from Conexant Systems described a WCDMA receiver design, and a paper from Chiao-Tung University revealed an early-late gate scheme for Bluetooth packet receiving that eliminates the use of ADC.
Joseph Williams of Bell Laboratories started the Networking ICs session with an invited talk on the architectures for networking processing. The talk described a survey and analysis of architecture features shared among commercial network processors that perform packet processing via the flexibility of a microprocessor, but with the performance of a dedicated ASIC. A paper from Bell Labs described simple link protocol for zero-overhead high-speed Ethernet packet delineation. Three papers from Taiwan covered circuits for k-WTA/sorting network, routing switch design for irregular interconnect network, and an RFIC for a DCS 1800 base station receiver downconverter.
The Communication ICs session featured an invited paper from K. Azadet of Bell Labs describing the main challenge in 1000 BASE-T Gigabit Ethernet: DSP implementation. A paper by Yu et al. from UCLA and Bell Labs demonstrated a 38% power savings in a FIR filter design by using a novel number presentation that avoids MSBs switching. Another Bell Labs paper described a 2X throughput design of 14-tap PDFD for 1000 BASE-T Gigabit Ethernet.
Josef Fenk of Infineon delivered the invited paper for the Mixed Signal session. Fenk gave a status review and development trend for digital cellular and cordless system, which demands highly integrated RF ICs for GSM, DECT, and UMTS. Tiew et al. from the U.K. described a design of a sixth-order MASH DS modulator. Huang et al. from Taiwan presented a cost-effective design binary FSK demodulator that eliminates the need for a postdetection filter.
The Multimedia Processing session featured A. Theuwissen of Philips as an invited speaker on comparison of CCD and CMOS image sensors. Theuwissen analyzed the reason for better CCD image quality and predicted future trends. Another invited paper by Paul Stravers of Philips Research argued the drive for chip-level homogeneous multiprocessing implementation for multimedia processing. Three papers described various aspects of MPEG and JPEG designs. Samsung presented S3C4520X, a System-On-A-Chip system manager for network applications. Windbond presented another System-On-A-Chip for an analog and digital record, playback, and processing system.
The Specialized Circuit techniques session covered innovations on ESD protection, low-noise amplifiers, low-voltage charge pumps, a single-chip Intelligent Power Module, and a programmable BIST scheme.
In the Logic Circuits session, O. Takahashi of IBM Research delivered an invited paper for Sang Dhong on power-conscious circuit design techniques for high-performance processors. Cary Chin of Sun Microsystems delivered the other invited paper for Ward Vercuysee on CAD methodology challenges fueled by a fast-paced increase in microprocessor design complexity and performance. The session also featured several SOI design techniques from IBM, a systolic multiplier, an efficient inversion and division unit, and a level shifter design for 0.13-µm technology.
The VLSI-TSA also provided a forum for the recognition of individuals who have made outstanding contributions to the progress and development of the VLSI industry in Taiwan. This year, three individuals were recognized at the plenary session on 18 April. They were Dr. Bob O. Evans, Managing Partner at Technology Strategies and Alliances and a Partner in Rocket Ventures; Dr. Genda J. Hu, Vice President of Advanced Technology Development at TSMC; and Dr. Ding-Yuan Yang, Vice Chairman of Winbond Electronics Corporation.
The International Symposium on VLSI Technology, Systems, and Applications is held every other year. For information on the 2003 conference, look on the conference website, www.erso.itri.org.tw/vlsi-tsa, starting in early 2002.
Presentation slides for the 2001 conference are available on the conference website. The Proceedings of Technical Papers of 2001 International Symposium on VLSI Technology, Systems, and Applications can be purchased either by contacting the conference secretariat (annielee@itri.org.tw) or through the IEEE (IEEE Catalog Number: 01TH8517).