Santa Clara Valley Chapter Report
Formation
In the fall of 1996 a colleague, Jonathan David, came into my office at
Cadence Systems. He said the Solid-State Circuits Council would become
a society next year and he thought a local SSCS chapter would be appropriate.
I was involved in activities of other Santa Clara Valley IEEE chapters
(Magnetics Society, Communications Society, and Microwave Theory and Technics
Society). We discussed my experiences and I told him: “This is the
place for an SSCS chapter.” After 40 years, Santa Clara Valley is
still the heart of the IC design industry.
The first meeting was scheduled shortly after the 1997 ISSCC. Ken Kundert,
a Cadence Fellow and an expert in continuous time simulators, spoke on
“Simulation of jitter in phase-locked loops using Spectre RF.”
Spectre is the continuous time simulator part of Cadence EDA suite tools.
The inaugural meeting attendees signed the petition to form the chapter
and Jonathan David became its first Chapter Chair.
The IEEE Executive Committee of the Santa Clara Valley Section advised
that successful chapters operate with a fixed time and place for meetings
to establish a regular attendance base. To avoid overlapping with other
established chapters with similar technical interests, we picked the third
Thursday of each month. We selected the centrally located Cadence campus
as our meeting site. For over seven years we have held seven to nine technical
meetings a year, recessing in July, August, and December, and sometimes
in January.
 |
| Kris Pister lecturing on “Dust circuits and applications” at the 19 February 2004 technical meeting. The Santa Clara Valley SSCS Chapter meets the third Thursday of every month at the centrally located Cadence facility in a well-lit auditorium that seats 100, with two projectors and an amplifier system. |
The Events
We strive to serve our industry needs by having presentations on cutting-edge
circuits, technologies, and methods, to advance the state of the industry,
to broaden the knowledge of our members, and to provide networking opportunities
for the speakers and attendees. Past presentation topics have covered
a broad range of circuits: from bandgap reference through RF power amplifiers,
A/D converters, iterative decoders, filters, novel EDA tools, state-of-the-art
microprocessors, and methods to achieve a 10-million-gate System On a
Chip. We have touched exotic subjects like MEMS and even superconductor
quantum phenomena in electronics. It has been our philosophy that a professional
chapter should fulfill the professional needs of the members, rather than
serve to reeducate with a lot of courses organized by university professors
on university grounds. We let academia run those courses.
To determine events and speakers we use a variety of methods: consulting
solid-state-related professional publications, reading industry trade
magazines, surveying our attendees for suggestions and their interests,
and reviewing ISSCC and CICC proceedings. It is a permanent task of every
officer/volunteer to think about and suggest speakers at planning meetings,
although we have tried a dedicated person, a program chair, to fulfill
that task. Our speakers are experts and specialists from renowned companies
in the industry, professors or PhD candidates from respected educational
institutions, and IEEE Distinguished Lecturers. It takes a lot of energy
and time to contact the speaker, to agree on the content of the presentation,
and to have the speaker provide an abstract and a short biographical note,
all of which will constitute the bulk of the scheduled meeting announcement.
While students are always welcome to attend, we make a special effort
each year to invite presentations by PhD candidates from the local universities,
primarily Stanford and U.C. Berkeley, to maintain a healthy level of communication
between industry and academia.
Our chapter has grown to over 1600 members. Meeting attendees are mainly
IC designers in the area. Most are IEEE members. Many Senior Members and
numerous IEEE Fellows belong to our chapter, so we draw from a prestigious
list of “Who’s Who” in the field of solid-state circuits.
Six to eight members become Senior Members every year. Our forum, through
its meeting topics and the technical breadth of the presentations, is
an incentive for attendees to become members of IEEE (if they are not
yet).
In 2002 average attendance for three fall meetings was 77. For our nine
meetings in 2003 average attendance was 52. On May 13 this spring we broke
all previous attendance records when 160 participants came to hear Phillip
E. Allen, Schlumberger Professor School of Electrical and Computer Engineering
from Georgia Institute of Technology, lecture on “The practice of
analog IC design.”
 |
| Santa Clara Valley Chapter officers (left to right): Web master Perry Chow, Chapter Chair Dan Oprica, Treasurer Eric Hoffman, Secretary June Song, and Host Jonathan David, the chapter founder. The Vice Chair, Sorin Spanoche, was absent for the photo. |
Chapter Management
We meet on the Cadence Campus at 6:30 p.m. Refreshments are served and
we network until 7:00 p.m., when the presentation starts. An hour to an
hour and a half format is a more ample forum than compressed technical
presentations at conferences such ISSCC or CICC. Mostly we use a free
format, allowing questions during the presentation, which makes the evening
vivid, interactive, and more interesting. We allow time after the presentation
for further discussions with the speaker, at his convenience. We present
each speaker with a logo plaque as a gesture of our appreciation. At times,
we invite the speaker out for dinner. We always ask the speakers to provide
us with their presentation (in pdf or ppt format), which we post on our
Web site with other interesting presentations (ewh.ieee.org/r6/scv/ssc).
The tasks of our elected officers are described in IEEE bylaws. We determined
that, besides the four elected officers, three other volunteers are sufficient
to run the chapter. It is essential to have an electronic communications
person (Web master) to maintain our RSVP email list and send periodic
meeting announcements. The chapter host (a Cadence employee) arranges
access to the meeting’s premises. We would like to have a third volunteer,
a hospitality chair, to organize publicity and order refreshments for
the meetings. At the moment we take turns volunteering to fill that task.
Most administrative matters are handled by email. Event planning is done
at officers’ meetings preceding or following the technical meetings
and occasionally at other meetings that are called as needed.
A great help in publicity is the San Francisco Bay Area Council’s
electronic Calendar & Newsletter (www.ieee-sfbac.org/grid),
where all our local chapter events are posted. Until April 2004 this was
run by Doug Davolt (who recently retired), the editor of our local IEEE
publication, GRID, for the last two decades. Paul Wesling, a seasoned
Web master, now runs this local, web-only GRID publication.
If we had the time and budget, we would organize Short Courses and workshops,
and assist with the ISSCC and CICC conferences in our local area. Last
year we organized a course to help job seekers retrain themselves. We
plan to have an RFIC design course for which I have drafted the contents.
I need another three or more volunteers to accomplish this task.
Running a chapter, particularly one with numerous members, is a task of
paramount importance. We are proud of our achievements and are very satisfied
to serve our professional community. Organizing the events, meeting the
speakers, and networking with our peers in an elevated professional environment,
which we create, is a wonderful endeavor!
Dan Oprica
Santa Clara Valley Chapter Chair
opricad@ieee.org
