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Optical Interconnects and Processing Systems

The Optical Interconnects and Processing Systems subcommittee solicits papers on advanced optical interconnection system architectures; enabling technologies, and signal processing and coding for optical interconnects in computer, memories, neural and sensor network systems. Technologies for board scale and chip scale optical interconnects include chip to network integration; CMOS compatible photonic material and devices; silicon photonics, plasmonics and PLC for system integration; light generation in silicon; arrays of integrated optoelectronic devices.

Announcements:

Paper Submission Deadline:
9 July 2008

Conference Forms:

Registration Form

Short Courses
Registration Form




Conference Administrator:

Mary S. Hendrickx
Phone +1 732 562 3897
Fax +1 732 562 8434
m.hendrickx@ieee.org
 

 

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