Question 025-08: What are the major differences between the MOSFET models that are required for digital and analog circuit simulation/design using CMOS technology? What is the extent of additional MOSFET parametric characterization required for analog circuit design when compared to digital? Do the various CMOS fabrication houses generally characterize all the available technology libraries for both digital and analog applications?         

Answer 025-08: Both analog and digital circuit simulation requires models which accurately describe the DC currents and terminal charges of the MOSFET as a function of the applied bias.  MOSFETs in digital circuits sweep through a range of voltages during a switching event and the integrated current and total change in terminal charge must be accurate. In an analog circuit many devices experience small AC signals around a fixed DC bias point. For analog simulation, the derivatives of the current and charges with respect to the applied biases must also be accurate.  For logic models, accurate off-state leakage currents are important for determining standby power which is typically less important in analog application. For either analog or digital models, the measurements of current and low frequency capacitance at many bias points are taken and used for modeling.  In some cases smaller voltage steps are used to get more accurate derivatives for analog models.

In addition, if the analog circuit is operated at frequencies above 0.5 GHz accurate parasitic capacitances become important. These are normally measured using a network analyzer to measure S-Parameters. The term "RF model" is commonly used to describe a model which has been tuned to match such high frequency measurements.

The capabilities of CMOS models vary depending on the maturity of the technology and the intended application. Semiconductor foundries typically provide modeling reports which describe how the model was generated what usages it is intended for and provide some typical plots of the model overlaid on lab measurements.  

Question 024-08: As a part of the project we aim to derive a concise but precise equation for Si MOSFET - first single gate then vertical gate stack.  However we need experimental data for comparative study and curve fitting.  I wanted to know from where we could get experimental data (not simulated).  We were looking out for really large set of data.  I already have looked up EDS and other publications but data are either inadequate or incompatible to our need. 

Answer 024-08: The best way to obtain measurement data to validate an analytical model is to establish research collaborations with semiconductor foundries like TSMC, Chartered, Silterra, and so on. You can contact foundries directly or through IEEE EDS Compact Modeling Technical Committee (CMTC). The other source is Compact Modeling Council (CMC), a consortium that benchmarks and standardizes emerging compact models for industrial applications. The EDS CMTC’s mission includes close interaction with semiconductor foundries to facilitate the validation of emerging compact models and could be helpful.