Amitava Chatterjee received his Ph.D. degree in electrical engineering in 1985 from Rensselaer Polytechnic Institute, his M.S. degree in electrical engineering in 1980 from Louisiana State University, and his B.Tech degree in electronics and electrical communications engineering from Indian Institute of Technology, Kharagpur in 1978. His Ph.D. research was on the theory of high-field transport and associated noise and his M.S. research was on band alignment and transport in heterojunction diodes.

Since 1985 he has worked on silicon research and development at Texas Instruments, Dallas. There he was elected to Senior Member of Technical Staff in 1991 and to Distinguished Member of Technical Staff in 1998. Currently, he is responsible for process integration to enable embedded analog functions in 0.13 micron digital CMOS technology. He has contributed over 75 technical papers and 15 patents in diverse areas of CMOS VLSI. His recent contributions include discovery of a drain-induced barrier lowering mechanism unique to halo implanted MOSFETs, development of the replacement metal gate MOSFET, and inventions contributing to manufacturable STI technology.