T-ED Editor Biographies

MOS Devices and Technology

David Esseni

Universita degli Studi di Udine
DIEGM
via delle Scienze 208
I-33100 Udine, Italy
Tel: +39 0432 558 294
Fax: +39 0432 558 251
E:Mail: esseni@uniud.it

David Esseni received the Laurea degree and the Ph.D. in Electronic Engineering from the University of Bologna, Italy in 1994 and 1998, respectively. During year 2000 he was a visiting scientist at Bell Labs - Lucent Technologies, Murray Hill (NJ-USA). Since 2005 he is an Associate Professor at the University of Udine, Italy. His research interests are mainly focussed on the characterization, modelling and reliability the of MOS transistors and Non-Volatile Memories (NVM). In the field of NVM he has worked on the low voltage and the substrate enhanced hot electron phenomena and on several aspects of Flash EEPROM Memories, including innovative
programming techniques and reliability issues related to the statistical distribution of the stress-induced-leakage-current. Starting from year 2000, David Esseni has been much involved in the field of advanced or innovative CMOS devices. In particular he has experimentally investigated low-field mobility in ultra-thin SOI MOS transistors and then started an activity of semi-classical transport modelling in advanced n-MOS and p-MOS transistors. In this field, his research interests also include quantization models beyond the effective mass approximation as well as modelling and characterization of stress effects on the CMOS technologies. Dr. Esseni served as a member of the technical committee of the International Electron Devices Meeting (IEDM) in 2003 and 2004, is currently in the technical committee of the
European Solid- State Device Research Conference (ESSDERC) and the International Reliability Physics (IRPS), and is a member of the Technology Computer Aided Design Committee of the Electron Devices Society (EDS).

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Editor-in-Chief