Perhaps no single development has had as much impact on the microelectronics industry as the SPICE (Simulation Program with Integrated Circuit Emphasis) program, which originally was developed by Laurence Nagel during his graduate studies at the University of California, Berkeley. SPICE and its subsequent enhancements moved mainstream circuit design from empirical, bread-board-based design into the era of scientifically based simulation and modeling. Nagel incorporated both direct current and alternating current analysis; transient analysis; and, based on adjoint network theory and sparse matrix techniques, efficient sensitivity, noise, and distortion analysis. SPICE was made freely available from the start and was widely adopted by universities, allowing students to learn how circuits work without having to build them and to easily evaluate design alternatives. Today's multibillion-transistor ICs, especially mixed-signal and precision analog ICs, would be impossible without the detailed circuit simulation that SPICE provides.
An IEEE Life Fellow, Nagel is president of Omega Enterprises Consulting, Kensington, CA, USA.
William S. Carter and Stephen Trimberger were pioneers at Xilinx, creating and refining an important new semiconductor product category—field-programmable gate-array technology (FPGA), now a multibillion-dollar industry. Carter saw that Moore’s Law would make FPGAs increasingly capable and useful and developed efficient circuits for implementing programmable logic. He designed the Xilinx XC2000 and XC3000 FPGAs and led the engineering effort on later versions. Trimberger’s experiments on the architecture of the fabric and its influence on the performance of a user design as well as its impact on the design of the silicon was crucial in developing efficient FPGA architectures. Many features of this approach are now standard for all programmable logic manufacturers. Carter and Trimberger helped form a new industry with profound and beneficial societal impact. FPGAs are used in aerospace and defense; IC prototyping; audio/video and image processing; automotive, professional, and consumer electronics; data-center and high-performance computing; industrial control; security and surveillance; medical systems; and wired and wireless communications. Carter and Trimberger’s technical leadership, innovation, and vision have been critical to making FPGAs as popular and important as they are today.
Carter is retired in Los Gatos, CA, USA. IEEE Fellow Trimberger recently retired from Xilinx and lives in Incline Village, NV, USA.
The groundbreaking contributions of Takao Nishitani and John S. Thompson to the development of the first single-chip, real-time programmable digital signal processors (DSPs) revolutionized communications networks and changed how society works, is educated, and is entertained. While their work was conducted independently (Nishitani at NEC and Thompson at Bell Labs), it culminated with the simultaneous publication of two pioneering papers at the 1980 IEEE International Solid-State Circuits Conference and, later, the first commercial DSPs. To overcome the bottlenecks that prevented a conventional microprocessor from executing voiceband signal processing algorithms in real time, they chose to modify the computation model developed from the 1950s that had dominated computer architectures. Their concepts featured high-speed, real-time, multiply-accumulate operations via hardware multipliers and split-memory architectures to independently and simultaneously address program instructions. Their realization of DSPs has played an important role in the development of the advanced networks and devices that people take for granted today.
An IEEE Life Fellow, Nishitani is a principal with LAISIP, Kanagawa, Japan. An IEEE Life Senior member, Thompson is retired in Tucson, AZ, USA.
Miles A. Copeland’s 31-year career is marked by the strength of his achievements as a university teacher, inventor, researcher, and mentor. His innovative approach to industry-university collaboration supported the rapid development of the telecommunication and microelectronics industries in Canada. He co-authored, with Northern Telecom (Nortel), a ground-breaking paper on the use of switched capacitors as resistor equivalents, which demonstrated that filter RC time constants on-chip could depend on the ratio of capacitor sizes. This results in much better integration, repeatability, and accuracy when implementing analog filters on chip than is possible with ordinary resistors. The “filter codec” developed subsequently at Nortel used switched capacitor filtering. With this innovation the company became an early leader in the shift to fully electronic switching networks. Other research work done by Miles's graduate students included much cited studies of the matching of on-chip capacitors and transistors, and how to design on-chip transformers and inductors in CMOS/BiCMOS technologies. This supported the design of fully integrated on-chip radios at Ghz frequencies.
An IEEE Fellow, Dr. Copeland is a Professor Emeritus with Carleton University, Ottawa, Ontario, Canada.
The pioneering contributions of Robert W. Adams to delta-sigma data conversion technology laid the groundwork responsible for the professional-quality audio featured in today’s digital consumer devices. His "noise-shaped segmentation" concept permits cost-effective integrated circuits using less space and power to deliver high-quality audio. Mr. Adams designed one of the earliest digital audio recorders, and he introduced the first audio converter with 18-bit resolution. In the signal-processing domain, he developed the first integrated asynchronous sample-rate converter for audio as well as a line of audio CODECs with an embedded DSP core of his own design, used extensively in today’s automotive audio systems. He also discovered the log-domain analog filter principle in 1978, which provided a fundamental new building block for analog designers.
An IEEE Fellow, Mr. Adams is currently a Fellow with Analog Devices, Inc., Wilmington, MA, USA.
Robert G. Meyer revolutionized the use of on-chip inductors in silicon radio-frequency (RF) integrated circuits (ICs) for communications. Prior to his work during the 1990s, on-chip inductors were thought to be too bulky and inefficient for high-performance RF applications. Dr. Meyer took a new direction and demonstrated their potential. Today, on-chip inductors are an integral part of cellular device technology with nearly all high-speed chips using one to several dozen integrated inductors. His design for a precision silicon IC power detector has also been used in large volumes in the cell-phone industry. He also contributed the first tunable, completely monolithic silicon oscillator in the gigahertz frequency.
An IEEE Life Fellow, Dr. Meyer is Professor Emeritus and professor in the Graduate School with the Department of Electrical Engineering and Computer Sciences at the University of California, Berkeley, CA, USA.
Anantha P. Chandrakasan’s pioneering work on low-power circuit design methods has helped overcome one of the most important design constraints in developing integrated circuits. Dr. Chandrakasan has published the most comprehensive body of work in the low-power circuit field, enabling reduction in energy storage requirements that constrain chip and device size. In 1994, Dr. Chandrakasan presented a complete low-power chip set for multimedia applications requiring just 5 mW of power, at a time when chips required 100 times that level. A radical concept that is now commonplace, the work resulted in a tablet computer that was the precursor to today’s handheld multimedia devices. He has continued to impact today’s low-power circuit design with key contributions to dynamic voltage scaling, ambient energy scavenging, ultra-low-power analog-to-digital conversion, and micro-power radios.
An IEEE Fellow, Chandrakasan is the Joseph F. and Nancy P. Keithley Professor of Electrical Engineering and the Department Head of Electrical Engineering and Computer Science at the Massachusetts Institute of Technology, Cambridge.
Behzad Rezavi’s pioneering work on high-speed complementary metal-oxide semiconductor (CMOS) circuits for communications technologies has helped change the field of circuit design and continues to push the envelope of high-performance analog integrated circuits. Dr. Razavi pioneered the concept that innovations at the architecture level can greatly relax the design at the circuit level for wireless transceivers. He was an early proponent of direct conversion for wireless transceivers, which has become widely used in many wireless systems including cellular phone handsets. With his students at the University of California, Los Angeles (UCLA), Dr. Razavi has explored new architectures for radio-frequency (RF) applications from 900 MHz to 60 GHz, introducing “synthesizer-friendly” transceivers. Dr. Razavi is also known for applying RF concepts to wireline/fiber-optic transceivers, in particular, clock and data recovery (CDR) circuits and broadband amplfiers. He and his students were the first to demonstrate 10-Gb/s and 40-Gb/s CDR circuits in CMOS technology. He was named one of the top 10 authors in the 50-year history of the IEEE International Solid-State Circuits Conference.
An IEEE Fellow, Dr. Razavi is currently a professor with the Electrical Engineering Department at UCLA.
Willy Sansen has provided the leadership necessary to establish analog integrated circuits as a crucial component of the microelectronics industry. Focusing on the design of analog integrated circuits, Dr. Sansen grew his research group (ESAT-MICAS) at the Katholieke Universiteit Leuven, Belgium, into one of Europe’s largest and best known. Designs originating from his group have been incorporated by companies worldwide for use in chips for wireless communications, consumer electronics, and sensors for cochlear implants and telemetry systems. Dr. Sansen was a pioneer of using computer tools for symbolic analysis of circuits, providing greater insight during the design process compared to purely numerical analysis methods. Known for excellence in teaching and the ability to inspire, his doctorate students have progressed to hold highly regarded positions in both industry and academia worldwide.
His collaborative efforts with industry have also resulted in successful spin-off companies. An IEEE Life Fellow, Dr. Sansen is Professor Emeritus at the Katholieke Universiteit Leuven in Belgium.
Considered one of the top integrated-circuit researchers in the world, Takayasu Sakurai’s contributions to CMOS technology have enabled the scaling down of chip sizes needed for today’s handheld electronics. Dr. Sakurai was one of the earliest researchers to create solutions to power problems facing CMOS logic circuit designers. His simplified models provide designers with intuition of chip performance that is needed to use circuit simulation tools effectively. The “Sakurai model,” developed in 1991, was the world’s first realistic interconnect delay and capacitance model formula and plays a key role in developing today’s high-speed circuits. His “alpha power law model” has been used in many tools for estimating how transistor performance will scale with technology to optimize size and at the same time minimize power.
An IEEE Fellow, Dr. Sakurai is currently a professor with the University of Tokyo’s Institute of Industrial Science.
An engineer, scholar, and entrepreneur who saw the potential for combining digital signal processing (DSP) and radio-frequency (RF) circuitry on a single chip, Teresa H. Meng enabled the wireless freedom needed for universal personalized network access through wireless communications. Dr. Meng’s strategy of integrating DSP and RF in standard CMOS technology has become the basis of today’s lower-cost, lower-power, and higher-performing wireless systems.
In 1999, while on leave from Stanford University, Dr. Meng founded Atheros Communications to produce high-volume, inexpensive integrated chips for wireless local area network (WLAN) applications, enabling WLANs to move from specialized to widespread use, such as in office and home environments. After returning to Stanford in 2001, Dr. Meng has focused her research efforts on bio-implant technologies, neural prosthetics and noninvasive medical treatments using focused EM energy.
Dr. Meng is an IEEE Fellow and a member of the National Academy of Engineering, and she is currently the Reid Weaver Dennis Professor of Electrical Engineering at Stanford University, Stanford, CA.
Asad A. Abidi, professor of electrical engineering at the University of California, Los Angeles, is a pioneer in the field of radio-frequency complementary- metal–oxide–semiconductor (RF) CMOS technology. His research, which drove the integration of baseband processing and RF technologies into traditional digital CMOS integrated circuits, has had a significant influence on communications technologies. While as recently as 15 years ago the idea of RF-CMOS was not considered a viable solution for sensitive wireless applications, it has since been embraced by a number of leading semiconductor companies including Texas Instruments, Broadcom and Atheros. RF-CMOS is currently incorporated into nearly all commercial Bluetooth and wireless networking products and is making inroads into the new generation of systems-on-a-chip for mobile telephones. An IEEE Fellow, Dr. Abidi has received numerous awards and honors, including induction into the U.S. National Academy of Engineering, the IEEE Millennium Medal, and the IEEE Donald G. Fink Prize Award.
Hugo De Man is professor emeritus at the Katholieke Universiteit Leuven (K.U. Leuven) in Belgium, the institution from which he earned his bachelor’s and doctoral degrees. He also co-founder and Senior Fellow at the Interuniversity Microelectronics Center (IMEC) in Leuven.
During his 40 years of work combining advanced electronic design automation, or EDA, research and integrated circuit design at the edge of CMOS technology scaling. Dr. De Man has pioneered the high-level synthesis and hardware/software co-design of systems-on-chip (SoC). He has worked on several key aspects of solid-state circuits including, mixed-signal design; the development of layout and switched-capacitor filter simulation tools (co-designing such filter chips for audio systems); high-level synthesis for digital signal processor (DSP) systems (resulting in the Cathedral silicon compiler suite), the first operational silicon compilers for industrial DSP chips; high-level synthesis of programmable co-processors (increasing design productivity); and SoC design for nanoelectronics.
An IEEE Fellow, he founded IMEC, now the largest independent microelectronics research organization in Europe, with more than 1,400 employees.
Dr. Mark Horowitz is recognized as one of the leading scholars of his generation in integrated circuits and systems design.
The director of the Computer Systems Laboratory and Yahoo! Founders professor of the school of engineering at Stanford University, and chief scientist at Rambus, Inc., Dr. Horowitz’s contributions encompass many areas. They include computer architecture, semi-conductor memory, the design and modeling of high-performance and low-power VLSI circuits and systems, and circuit design for high-performance data links.
Dr. Horowitz’s initial work focused on creating high-performance VLSI computing systems, working both on building the basic CMOS circuit elements (adders, memories, etc.), as well as complete systems. He has overseen many processor design efforts at Stanford, including MIPS-X, one of the first processors to have an on-chip instruction cache, TORCH, a statically-scheduled, superscalar processor, and FLASH, a flexible DSM machine.
He is best known for his groundbreaking research on high-speed CMOS data link interfaces especially for memory connections to high-performance computing, signal processing systems and other uses. He and his students greatly increased the bandwidth of I/O interface circuits, which are a major bottleneck in modern computing and signal processing systems. This work on interface circuits for CMOS data transfer and signaling links changed perceptions of memory and other I/O interfaces and fostered a revolution in the electronics industry. His studies of I/O phase adjustment circuitry led to the design of novel phase-locked loop circuits, some of which are in widespread commercial use.
Dr. Horowitz also is internationally recognized as a pioneer in low-power VLSI circuits and systems. He was one of the first researchers to recognize that power consumption would limit the performance of large data and signal processing systems as CMOS technology was scaled to the deep submicron range. This understanding prompted him to introduce the idea of using multiple power supplies and grouping circuits into critical and non-critical clusters to minimize VLSI-processor power dissipation. He and his students also made key contributions to the design and application of adaptive voltage regulators for conserving power in digital systems and their interfaces.
He is a Fellow of both the IEEE and the Association for Computer Machinery. He is a member of IEEE Solid State Circuits Society advisory committee and a past member of its meetings and program committees.
Dr. Horowitz received his bachelor’s and master’s degrees from the Massachusetts Institute of Technology and his doctorate from Stanford University, all in Electrical Engineering.
Dr. Bruce A. Wooley, chairman of the Department of Electrical Engineering at Stanford University, is a pioneer in the field of integrated voice band coder-decoder (codec) circuits. While at Bell Labs in Holmdel, NJ, he helped establish the technique of per-channel coding, a bellwether for the telephone industry at the earliest stage of the integrated circuit industry. Dr. Wooley is most widely recognized for his work on oversampling techniques for analog-to-digital and digital-to-analog conversion, today a nearly universal approach to encoding voice and digital audio signals. His recent work has focused on increasing the power efficiency of integrated analogto-digital converters, an improvement crucial to applications in portable systems.
An IEEE Fellow, Dr. Wooley has served as the president of the IEEE Solid-State Circuits Society and editor of the "IEEE Journal of Solid-State Circuits," as well as chairman of both the ISSCC and the IEEE Symposium on VLSI Circuits.
A renowned expert in low-power CMOS circuit design, Dr. Eric A. Vittoz also is recognized for his groundbreaking work with miniature electronic devices. His contributions at Centre Electronique Horloger (CEH) in Neuchâtel, Switzerland, in the early 1960s advanced the development of the first electronic wristwatch. His work has fueled innovations including low-voltage CMOS logic; circuits based on MOS transistors operated in weak inversion, as bipolars and as pseudoresistors; and biology-inspired processing. With colleagues at the Swiss Federal Institute of Technology (EPFL) in Lausanne and CEH, he developed a MOS model for low-current and low-voltage circuit design known as the EKV model. His work has been applied to a wide range of battery-operated instruments. Dr. Vittoz is Research Fellow at the Swiss Center for Electronics and Microtechnology in Neuchâtel and a professor at EPFL. An IEEE Fellow, he has published more than 130 papers and holds 26 patents.
Dan Dobberpuhl's microprocessor work has consistently advanced the state of the art. At Digital Equipment Corporation, in Palo Alto, CA, he led the development of a number of microprocessors including the T11, a design that singularly cut the number of transistors on a chip from 68K to 13K and implemented a more complex machine; the ALPHA, whose fast clock design techniques are now the industry standard; and the Strong-ARM processorTM, which raised the bar on performance while decreasing power dissipation.
An IEEE member, Mr. Dobberpuhl has published many papers on circuits and microprocessors; has 15 patents issued or pending; and is co-author with Mr. Lance Glasser of The Design and Analysis of VLSI Circuits, a leading text in the field. He is vice president and general manager of the Broadband Processor Business Unit at Broadcom Corporation, in Irvine, CA. StrongARM is a registered trademark of ARM, Ltd.
Dr. Chenming Hu’s research has greatly influenced the area of MOSFET modeling. Working with Dr. Ping-Keung Ko, he contributed to key physical models for nearly all features of the electrical behavior of modern MOSFETs. The duo’s leadership also led to the Berkeley Short-Channel IGFET Models (BSIM), a groundbreaking device model that is an industry standard entirely in the public domain. Along with Dr. Ko, Dr. Hu has published about 200 papers on MOSFET physical models.
A Fellow of the IEEE and a member of the U.S. National Academy of Engineering, Dr. Hu’s honors include the IEEE Jack A. Morton Award, Berkeley’s Distinguished Teaching Award, the Sigma Xi Monie Ferst Award, and a DARPA Most Significant Technological Accomplishment Award. He is Taiwain Semiconductor Manufacturing Company’s Distinguished Professor on leave from the University of California at Berkeley and holds the position of chief technology officer at TSMC.
During his tenure at Bell Labs, Dr. Ping-Keung Ko led the development of high-speed MOS technologies for telecommunications applications. With Dr. Hu, he founded the Berkeley Device Research Group, at the University of California at Berkeley, which focused on understanding the physics of MOS technology and devices. A notable result was BSIMs, used worldwide by IC engineers. Vice chairman and chief strategy officer of Authosis Inc., Quarry Bay, Hong Kong, Dr. Ko holds six patents and has written or coauthored about 200 papers and one book.
He is a Fellow of the IEEE and the Hong Kong Institute of Engineers, and he has received a Best Paper Award from the IEEE International Reliability Physics Symposium and a William Faid Memorial Prize in Physics.