EDS DISTINGUISHED LECTURER PROGRAM - LECTURERS RESIDING IN ASIA & PACIFIC

 


EDS DISTINGUISHED LECTURER PROGRAM - LECTURERS RESIDING IN ASIA & PACIFIC The EDS Distinguished Lecturer Program exists for the purpose of providing EDS Chapters with a list of quality lecturers who can potentially give talks at local chapter meetings. To arrange for a lecture, the EDS chapters should contact the Distinguished Lecturer directly. A general guideline for the visit, but not the absolute rule, is that the lecturer should be able to include the meeting site with an already planned travel schedule at a small incremental cost to the travel plan. Alternatively, a prior coincident travel plan would not be required if the lecturer is already located within an approximate fifty mile radius of a meeting site. Although the concept of the program is to have the lecturers minimize travel costs by combining their visits with planned business trips, EDS will help subsidize lecturer travel in cases where few/no lecturers will be visiting an area and/or a chapter cannot pay for all the expenses for a lecturer trip. For a full listing of EDS Distinguished Lecturers and travel plans please contact Laura Riello of the EDS Executive Office (Tel: 1-732-562-3927, Fax: 1-732-235-1626, E-Mail: l.riello@ieee.org).

SHOJIRO ASAI
Tel: +81 3 3214 3101
Fax: +81 3 3214 3025
E-Mail: s.asai@ieee.org
-Microelectronic Challenges - Microscopic Frontiers in Macroscopic Perspective
HIROYUKI MATSUNAMI
Tel: +81 75 7535340
Fax: +81 75 7535342
E-Mail: matsunam@kuee.kyoto-u.ac.jp


SIMA DIMITRIJEV
Tel: +61 7 3875 5068
Fax: +61 7 3875 5198
E-Mail: s.dimitrijev@me.gu.edu.au
-Development of Gate Oxides on SIC
-Issues and Trends in Microelectric Education
TADASHI NISHIMURA
Tel: +81 727 84 7301
Fax: +81 727 80 2685
E-Mail: nisimurt@lsi.melco.co.jp



MASAO FUKUMA
Tel: +81 42 771 0621
Fax: +81 42 771 0897
E-Mail: m.fukuma@ieee.org
-Device Technology for sub-100nm VLSIs -New Architecture and Circuits for Low Power and High Performance Processors




HIROSHI NOZAWA
Tel: +81 75 753 4725
Fax: +81 75 753 4725
E-Mail: nozawa@vega.energy.kyoto-u.ac.jp -Reliability Physics of Semiconductor Memory Devices
-Memory Based Parallel Data Processing -Applications of Ferroelectric RAM for Logic Devices -Modeling of Tunnel Oxide Current in Island Structure
KEN-ICHI GOTO
Tel: +81 462 50 8246
Fax: +81 462 50 8804
E-Mail: kgoto@flab.fujitsu.co.jp
-High Performance Sub-100nm CMOS Technology
-Laser Thermal Process for Ultra
-Low Contact Resistance -Decaborane Ion Implantation Technology for Shallow Junction -Co Salicide Process and CoSix Spike Leakage Mechanism

YASUHISA OMURA
Tel: +81 6 6368 0825
Fax: +81 6 6388 8843
E-Mail: omuray@ipcku.kansai-u.ac.jp
-Quantum Mechanical Short-Channel Effects in Scaled SOI MOSFETs and Design Issues
-SOI Insulated-Gate pn-Junction Devices: Operations, Performance and Applications -Ultimate SOI Device Structures: Is Double-Gate SOI Device Truly an Ultimate Structure
MARTIN A. GREEN
Tel: +61 2 9385 4018
Fax: +61 2 9662 4240
E-Mail: m.green@unsw.edu.au
-Photovoltaic Devices and Systems
-High Efficiency Silicon Solar Cells
-Low Cost Silicon Solar Cells
-Future Applications of Solar Cells



RADIVOJE POPOVIC
Tel: + 41 21 693 38 53
Fax: + 41 21 693 66 70
E-Mail: radivoje.popovic@epfl.ch
-Bridging the Gap Between Magnetoresistors and Hall Magnetic Sensors
-Integrated Hall Sensor/Flux Conventional CMOS Technology
-Avalanche Photodiode in Conventional CMOS Technology
YOSHIAKI HAGIWARA
Tel: +81 3 5435 3610
Fax: +81 3 5435 3803
E-Mail: yoshiaki.hagiwara@jp.sony.com
-Electronics For Home Entertainments
-VLSI Technology Behind Digital Consumer Appliances
-Introduction to Physics of Semiconductor Devices
(Please see http://www.ssdp.caltech.edu/aphee183/) -Measurement Technology for Home Entertainment LSI Chips
M.K. RADHAKRISHNAN
Tel: +65 3579363
Fax: +65 3858821
E-Mail: radhakrishnan@ieee.org
-Physical Analysis of Ultra Thin Gate Oxide Breakdown
-Building in Reliability and Failure in Analysis Challenges in Sub-Micron Devices
-Failure Mechanism Study of Sub-Micron Devices
-ESD Induced Failures in Devices and the Analysis
LIANG-KAI “KEVIN” HAN
Tel: +886 3 5781688 x4794
Fax: +886 3 5797310
E-Mail: lkhan@tsmc.com.tw
CHANDAN KUMAR SARKAR
Tel: +91 33 483 2304
Fax: +91 33 473 2217
E-Mail: phyod@yahoo.co.in

TAKEO HATTORI
Tel: +81 3 3703 3111
Fax: +81 3 5707 2173
E-Mail: hattori@ipc.musashi-tech.ac.jp
-Surface and Interface Structures of Ultratin Silicon Oxides



S.C. SUN
Tel: +86 360 1818
Fax: +86 362 2937
E-Mail: s.sun@ieee.org
-CVD and PVD Transition Metal Nitrides Diffusion Barriers for Copper Metallization -RTCVD of Nitrogen Doped Polysilicon for Dual Gate CMOS Applications
HIROSHI ISHIWARA
Tel: +81 45 921 5040
Fax: +81 45 924 5961
E-Mail: ishiwara@pi.titech.ac.jp
-Ferroelectric Random Access Memories
-Si-Based Heteroepitaxial Devices

KUNIO TADA
Tel: +81 45 339 4274
Fax: +81 45 338 1157
E-Mail: k.tada@ieee.org
-New Semiconductor Photonic Devices for Optical Communication and Photonic Switching
HIROSHI IWAI
Tel: +81 45 924 5471
Fax: +81 45 924 5584
E-Mail: h.iwai@ieee.org
-Silicon MOSFET Scaling Beyond 0.1 Micron

HIDEMI TAKASU
Tel: +81 75 311 2111
Fax: +81 75 321 6256
E-Mail: hidemi.takasu@dsn.rohm.co.jp
-Ferroelectric Memory Technology (Process & Device) and It’s Application
CHENNUPATI JAGADISH
Tel: +61 2 6125 0363
Fax: +61 2 6125 0511
E-Mail: c.jagadish@ieee.org
-Quantum Well Intermixing for Optoelectronic Device Integration
-Quantum Well Infared Photodetectors
-High Power Semiconductor Lasers
KENJI TANIGUCHI
Tel: +81 6 6879 7791
Fax: +81 6 6879 7792
E-Mail: taniguti@eie.eng.osaka-u.ac.jp



MASAAKI KUZUHARA
Tel: +81 77 537 7687
Fax: +81 77 537 7689
E-Mail: kuzuhara@bu.jp.nec.com
-Power GaAs Heterojunction FET with a Field Plate
-GaN- Based Heterojunction FET for High-Power Applications
KAZUO TSUBOUCHI
Tel: +81 22 217 5530
Fax: +81 22 217 5533
E-Mail: tsubo@riec.tohoku.ac.jp
-LSI Design for Wireless Communications -Current Mode Analog Circuit for Low Power Signal Processing
OH-KYONG KWON
Tel: +82 2 2290 0359
Fax: +82 2 2297 7701
E-Mail: okwon7@chollian.net
-High Voltage Devices and Ics for Smart Power Applications
-Driving Methods and Circuits for Flat Panel Displays
-Signal Integrity of Very High-Speed VLSI Systems
DAISUKE UEDA
Tel: +81 726 82 7802
Fax: +81 726 82 7738
E-Mail: daisuke@ieee.org
-Compound Semiconductor Devices and Circuits




JACK LAU
Tel: +852 2358 7043
Fax: +852 2358 1485
E-Mail: eejlau@ee.ust.hk



JUZER M. VASI
Tel: +91 22 5722545
Fax: +91 22 5723707
E-Mail: vasi@ee.iitb.ac.in
-Reliability of MOS Transistors with High-K Dielectrics
-SOI MOSFETS for Analog Applications
KEI MAY LAU
Tel: +852 2358 7049
Fax: +852 2358 1485
E-Mail: eekmlau@ust.hk


HISATSUNE WATANABE
Tel: +81 44 856 2009
Fax: +81 44 951 2080
E-Mail: watanabe@ab.jp.nec.com
-Development of Advanced Semiconductor Technology
KWYRO LEE
Tel: +82 42 869 3433
Fax: +82 42 869 8590
E-Mail: kwyro.lee@ieee.org
-RF CMOS Device Modeling
-Polylithic Integration of Electro-Acoustic RF Circuits Using QoS (Quartz on Silicon) -Technology for True Single Chip Radio
YUU WATANABE
Tel: +81 44 754 2690
Fax: +81 44 754 2691
E-Mail: yuu.watanabe@jp.fujitsu.com
-Compound Semiconductor Devices and Circuits


MIKE MYUNG-OK LEE
Tel: +82 613 330 3195
Fax: +82 613 330 2909
E-Mail: mikelee@hichips.com
-High Speed and Lower Power on CMOS Design: Processes to System Architecture -High Performances for Deep Submicron CMOS/SOI Technology
-Modeling for CMOS Devices and Circuits -Fundamentals to HCI Mechanism, Measurement and Modelings
-VLSI/ULSI Implementation for ATM and CDMA Systems
-Understanding of Submicron ESD and Failure Mechanism
-Design of iMEMS Chip with Wise Sensor for Automobile, Medical & Aerospace Applications -Low Power Communication Circuits and Systems (MPEG or ADSL, etc.) for Multimedia Use -Low Power Mixed-Mode Circuits for RISC and/or DSP Core
JAMES S. WILLIAMS
Tel: +61 6 249 0020
Fax: +61 6 249 0511
E-Mail: eme@rsphysse.anu.edu.au
-Ion Implantation Processing Issues for Compound Semiconductors
-Gettering of Metals to Cavities: Device Prospects
-Implantation Processing of Gallium Nitride












CHOON-LEONG LOU
Tel: +886 3 5910178 ext. 201
Fax: +886 3 5910210
E-Mail: lou_choon_leong@ieee.org
-Semiconductor Parametric Instrumentation and Systems
-Semiconductor Device Characterization and Parametrics
-Semiconductor Device Reliability
-Advanced Semiconductor Device Characterization
NAOKI YOKOYAMA
Tel: +81 46 250 8817
Fax: +81 46 250 8844
E-Mail: nyoko@flab.fujitsu.co.jp
-Nanotechnology






ANTONIO LUQUE
Tel: +3491 5441060
Fax: +3491 5446341
E-Mail: luque@ies-def.upm.es
-Photovoltaic Concentration, Physics and Engineering
-A Renewable Energy Scenario for the XXI Century







XING ZHOU
Tel: +656 790 4532
Fax: +656 791 2687
E-Mail: x.zhou@ieee.org
-Multi-level Modeling of Deep-Submicron CMOS ULSI Systems
-MOSFET Compact I-V Modeling for Deep-Submicron Technology Development -Hetero-Material Gate Field-Effect Transistors (HMGFET’s)
-Mixed-Signal Multi-Level Circuit Simulation: An Implicit Mixed-Mode Solution -Subpicosecond Electrical Pulse Generation by Nonuniform Gap Illumination

KAZUYA MASU
Tel: +81 45 924 5022
Fax: +81 45 924 5022
E-Mail: masu@ieee.org
-GHz Interconnect Design in VLSI
-Global Integration Technology